Am 21. Dezember 2022 19:15:04 UTC schrieb "Philippe Mathieu-Daudé"
<phi...@linaro.org>:
>On 21/12/22 17:59, Bernhard Beschow wrote:
>> code as possible and to bring both device models to feature parity such that
>> perhaps PIIX4 can become a drop-in-replacement for PIIX3 in the pc machine.
>> This
>> could resolve the "Frankenstein" PIIX4-PM problem in PIIX3 discussed on this
>> list before.
>>
>> The series is structured as follows: First, PIIX3 is changed to instantiate
>> internal devices itself, like PIIX4 does already. Second, PIIX3 gets prepared
>> for the merge with PIIX4 which includes some fixes, cleanups, and renamings.
>> Third, the same is done for PIIX4. In step four the implementations are
>> merged.
>> Since some consolidations could be done easier with merged implementations,
>> the
>> consolidation continues in step five which concludes the series.
>>
>> One particular challenge in this series was that the PIC of PIIX3 used to be
>> instantiated outside of the south bridge while some sub functions require a
>> PIC
>> with populated qemu_irqs. This has been solved by introducing a proxy PIC
>> which
>> furthermore allows PIIX3 to be agnostic towards the virtualization technology
>> used (KVM, TCG, Xen). Due to consolidation PIIX4 gained the proxy PIC as
>> well.
>>
>> Another challenge was dealing with optional devices where Peter already gave
>> advice in [1] which this series implements.
>>
>> Last but not least there might be some opportunity to consolidate VM state
>> handling, probably by reusing the one from PIIX3. Since I'm not very familiar
>> with the requirements I didn't touch it so far.
>>
>> v4:
>> - Rebase onto "[PATCH v2 0/3] Decouple INTx-to-LNKx routing from south
>> bridges"
>> since it is already queued via mips-next. This eliminates patches
>> 'hw/isa/piix3: Prefix pci_slot_get_pirq() with "piix3_"' and
>> 'hw/isa/piix4:
>> Prefix pci_slot_get_pirq() with "piix4_"'.
>> - Squash 'hw/isa/piix: Drop the "3" from the PIIX base class' into
>> 'hw/isa/piix3: Rename typedef PIIX3State to PIIXState'. I originally only
>> split these patches since I wasn't sure whether renaming a type was
>> allowed.
>> - Add new patch 'hw/i386/pc_piix: Associate pci_map_irq_fn as soon as PCI
>> bus is
>> created' for forther cleanup of INTx-to-LNKx route decoupling.
>
>Sigh I did the rebase this morning and was waiting for the test suite...
>https://gitlab.com/philmd/qemu/-/commits/mips-testing/
Hmm, I'm a little confused. I thought to do the rebase myself in order to help
which I announced yesterday.
AFAICS the nanoMIPS bootloader still needs to be adapted before this series can
be queued and tested. Let me know if I could help.
>Anyway I'll double-check with this series.
Thank you!
Best regards,
Bernhard
