On 12/24/22 00:16, Song Gao wrote:
+TRANS(vreplve_b, gen_vvr, gen_helper_vreplve_b) +TRANS(vreplve_h, gen_vvr, gen_helper_vreplve_h) +TRANS(vreplve_w, gen_vvr, gen_helper_vreplve_w) +TRANS(vreplve_d, gen_vvr, gen_helper_vreplve_d) +TRANS(vreplvei_b, gen_vv_i, gen_helper_vreplvei_b) +TRANS(vreplvei_h, gen_vv_i, gen_helper_vreplvei_h) +TRANS(vreplvei_w, gen_vv_i, gen_helper_vreplvei_w) +TRANS(vreplvei_d, gen_vv_i, gen_helper_vreplvei_d)
tcg_gen_gvec_dupm.
In the case of imm, this will be cpu_env + offsetof. In the case of reg, compute cpu_env + register offset + offsetof.
+TRANS(vbsll_v, gen_vv_i, gen_helper_vbsll_v) +TRANS(vbsrl_v, gen_vv_i, gen_helper_vbsrl_v)
These can use tcg_gen_extract2_i64, with imm * 8 bit shift. r~
