On Thu, Dec 29, 2022 at 04:23:24PM +0100, Philippe Mathieu-Daudé wrote:
> This SoC uses a Cortex-M4F. QEMU only implements a M4,
> which is good enough. Add a TODO note in case the M4F
> is added.
>
> Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Oh, yeah good to have a note of this somewhere.
Reviewed-by: Peter Delevoryas <pe...@pjd.dev>
> ---
> hw/arm/aspeed_ast10x0.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c
> index 02636705b6..788827ca9d 100644
> --- a/hw/arm/aspeed_ast10x0.c
> +++ b/hw/arm/aspeed_ast10x0.c
> @@ -421,7 +421,7 @@ static void aspeed_soc_ast1030_class_init(ObjectClass
> *klass, void *data)
> dc->realize = aspeed_soc_ast1030_realize;
>
> sc->name = "ast1030-a1";
> - sc->cpu_type = ARM_CPU_TYPE_NAME("cortex-m4");
> + sc->cpu_type = ARM_CPU_TYPE_NAME("cortex-m4"); /* TODO cortex-m4f */
> sc->silicon_rev = AST1030_A1_SILICON_REV;
> sc->sram_size = 768 * KiB;
> sc->secsram_size = 9 * KiB;
> --
> 2.38.1
>
