On 8/1/23 03:36, Richard Henderson wrote:
We expect the backend to require register pairs in host-endian ordering, thus for big-endian the first register of a pair contains the high part. We were forcing R0 to contain the low part for calls.Signed-off-by: Richard Henderson <richard.hender...@linaro.org> --- tcg/tci.c | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
