On Tue, 17 Jan 2023 at 16:10, Guenter Roeck <li...@roeck-us.net> wrote: > > On Mon, Jan 16, 2023 at 09:58:13PM -0700, Keith Busch wrote: > > On Mon, Jan 16, 2023 at 10:14:07PM +0100, Klaus Jensen wrote: > > > I noticed that the Linux driver does not use the INTMS/INTMC registers > > > to mask interrupts on the controller while processing CQEs. While not > > > required by the spec, it is *recommended* in setups not using MSI-X to > > > reduce the risk of spurious and/or missed interrupts. > > > > That's assuming completions are deferred to a bottom half. We don't do > > that by default in Linux nvme, though you can ask the driver to do that > > if you want. > > > > > With the patch below, running 100 boot iterations, no timeouts were > > > observed on QEMU emulated riscv64 or mips64. > > > > > > No changes are required in the QEMU hw/nvme interrupt logic. > > > > Yeah, I can see why: it forces the irq line to deassert then assert, > > just like we had forced to happen within the device side patches. Still, > > none of that is supposed to be necessary, but this idea of using these > > registers is probably fine. > > There is still no answer why this would be necessary in the first place, > on either side. In my opinion, unless someone can confirm that the problem > is seen with real hardware, we should assume that it happens on the qemu > side and address it there.
Sure, but that means identifying what the divergence between QEMU's implementation and the hardware is first. I don't want a fudged fix in QEMU's code any more than you want one in the kernel's driver code :-) thanks -- PMM
