On Mon, 6 Feb 2023 at 14:27, Corey Minyard <miny...@acm.org> wrote: > > On Mon, Feb 06, 2023 at 07:49:34PM +0000, Titus Rwantare wrote: > > This is a simple i2c device that allows i2c capable devices to have > > GPIOs. > > > > Reviewed-by: Hao Wu <wuhao...@google.com> > > Signed-off-by: Titus Rwantare <tit...@google.com> > > --- > > hw/arm/Kconfig | 1 + > > hw/gpio/meson.build | 1 + > > hw/gpio/pca_i2c_gpio.c | 362 ++++++++++++++++++++++++++++++++ > > hw/gpio/trace-events | 5 + > > hw/i2c/Kconfig | 4 + > > include/hw/gpio/pca_i2c_gpio.h | 72 +++++++ > > tests/qtest/meson.build | 1 + > > tests/qtest/pca_i2c_gpio-test.c | 169 +++++++++++++++ > > 8 files changed, 615 insertions(+) > > create mode 100644 hw/gpio/pca_i2c_gpio.c > > create mode 100644 include/hw/gpio/pca_i2c_gpio.h > > create mode 100644 tests/qtest/pca_i2c_gpio-test.c > > > > diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig > > index 2d157de9b8..1b533ddd76 100644 > > --- a/hw/arm/Kconfig > > +++ b/hw/arm/Kconfig > > @@ -418,6 +418,7 @@ config NPCM7XX > > select SSI > > select UNIMP > > select PCA954X > > + select PCA_I2C_GPIO > > > > config FSL_IMX25 > > bool > > diff --git a/hw/gpio/meson.build b/hw/gpio/meson.build > > index b726e6d27a..1e5b602002 100644 > > --- a/hw/gpio/meson.build > > +++ b/hw/gpio/meson.build > > @@ -12,3 +12,4 @@ softmmu_ss.add(when: 'CONFIG_OMAP', if_true: > > files('omap_gpio.c')) > > softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_gpio.c')) > > softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_gpio.c')) > > softmmu_ss.add(when: 'CONFIG_SIFIVE_GPIO', if_true: files('sifive_gpio.c')) > > +softmmu_ss.add(when: 'CONFIG_PCA_I2C_GPIO', if_true: > > files('pca_i2c_gpio.c')) > > diff --git a/hw/gpio/pca_i2c_gpio.c b/hw/gpio/pca_i2c_gpio.c > > new file mode 100644 > > index 0000000000..afae497a22 > > --- /dev/null > > +++ b/hw/gpio/pca_i2c_gpio.c > > @@ -0,0 +1,362 @@ > > +/* > > + * NXP PCA I2C GPIO Expanders > > + * > > + * Low-voltage translating 16-bit I2C/SMBus GPIO expander with interrupt > > output, > > + * reset, and configuration registers > > + * > > + * Datasheet: https://www.nxp.com/docs/en/data-sheet/PCA6416A.pdf > > + * > > + * Copyright 2023 Google LLC > > + * > > + * SPDX-License-Identifier: GPL-2.0-or-later > > + * > > + * These devices, by default, are configured to input only. The > > configuration is > > Yout initial email set they are output only by default
Oops, over the course of writing this I changed my mind on what the default should be. I've now checked it's all consistent. > > > > + * settable through qom/qmp, or i2c.To set some pins as inputs before > > boot, use > > + * the following in the board file of the machine: > > + * object_property_set_uint(Object *obj, const char *name, > > + * uint64_t value, Error **errp); > > + * specifying name as "gpio_config" and the value as a bitfield of the > > inputs > > + * e.g. for the pca6416, a value of 0xFFF0, sets pins 0-3 as outputs and > > + * 4-15 as inputs. > > + * This value can also be set at runtime through qmp externally, or by > > + * writing to the config register using i2c. > > When the real hardware comes up, can it be configured in some way > before the software access it through I2C? It seems odd to me that you > have a qemu configuration for something that wouldn't normally be > configurable by something at power up time. > > Philippe mentioned some things, too, but this looks good to me beyond > that. > > -corey Right, my intention is to not have an implicit dependency on the default configuration, I've re-written this section to be less confusing. Thanks for the review, I've sent v2. -Titus