On 2023/2/10 20:38, Daniel Henrique Barboza wrote:
We have a RISCVCPU *cpu pointer available at the start of the function.

Signed-off-by: Daniel Henrique Barboza <dbarb...@ventanamicro.com>
Reviewed-by: Weiwei Li <liwei...@iscas.ac.cn>

Regards,

Weiwei Li
---
  target/riscv/cpu_helper.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index ad8d82662c..3a9472a2ff 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -60,7 +60,7 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong 
*pc,
           * which is not supported by GVEC. So we set vl_eq_vlmax flag to true
           * only when maxsz >= 8 bytes.
           */
-        uint32_t vlmax = vext_get_vlmax(env_archcpu(env), env->vtype);
+        uint32_t vlmax = vext_get_vlmax(cpu, env->vtype);
          uint32_t sew = FIELD_EX64(env->vtype, VTYPE, VSEW);
          uint32_t maxsz = vlmax << sew;
          bool vl_eq_vlmax = (env->vstart == 0) && (vlmax == env->vl) &&


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