E500mc supports IVORs 36-41. Add them to the support mask. Drop SPE
support too.
Signed-off-by: Alexander Graf <ag...@suse.de>
---
v1 -> v2:
- drop SPE IVOR
---
target-ppc/translate_init.c | 6 +++++-
1 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 83348b5..f5fcd1e 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -4433,6 +4433,7 @@ enum fsl_e500_version {
static void init_proc_e500 (CPUPPCState *env, int version)
{
uint32_t tlbncfg[2];
+ uint64_t ivor_mask = 0x0000000F0000FFFFULL;
#if !defined(CONFIG_USER_ONLY)
int i;
#endif
@@ -4444,7 +4445,10 @@ static void init_proc_e500 (CPUPPCState *env, int
version)
* complain when accessing them.
* gen_spr_BookE(env, 0x0000000F0000FD7FULL);
*/
- gen_spr_BookE(env, 0x0000000F0000FFFFULL);
+ if (version == fsl_e500mc) {
+ ivor_mask = 0x000003FE0000FFFFULL;
+ }
+ gen_spr_BookE(env, ivor_mask);
/* Processor identification */
spr_register(env, SPR_BOOKE_PIR, "PIR",
SPR_NOACCESS, SPR_NOACCESS,
--
1.6.0.2
