Xilinx zynq-7000 machine model. Also includes device model for the zynq-specific system level control register (SLCR) module.
Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwa...@petalogix.com> --- Makefile.target | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/Makefile.target b/Makefile.target index e62ff59..1c89779 100644 --- a/Makefile.target +++ b/Makefile.target @@ -338,6 +338,7 @@ obj-arm-y += cadence_uart.o obj-arm-y += cadence_ttc.o obj-arm-y += cadence_wdt.o obj-arm-y += cadence_gem.o +obj-arm-y += xilinx_zynq.o zynq_arm_sysctl.o obj-arm-y += realview_gic.o realview.o arm_sysctl.o arm11mpcore.o a9mpcore.o obj-arm-y += arm_l2x0.o obj-arm-y += arm_mptimer.o -- 1.7.3.2