This completes the transition from tcg_const_* to
tcg_constant_* that started in 2020.
This isn't hard, but non-mechanical. One must identify when the
variable is used only for the constant, or if it is also written
as a general purpose temporary. For the most part, breaking this
apart makes the code easier to understand.
Based-on: 20230227052505.352889-1-richard.hender...@linaro.org
("[PATCH v2 00/76] tcg: Drop tcg_temp_free from translators")
which I've just realized is actualy based on v4 not v3 of
Message-Id: 20230227053701.368744-1-richard.hender...@linaro.org
("[PATCH v4 00/31] tcg: Simplify temporary usage")
so for avoidance of doubt:
https://gitlab.com/rth7680/qemu/-/tree/tcg-const (c44933e0)
r~
Richard Henderson (70):
target/arm: Use rmode >= 0 for need_rmode
target/arm: Handle FPROUNDING_ODD in arm_rmode_to_sf
target/arm: Improve arm_rmode_to_sf
target/arm: Consistently use ARMFPRounding during translation
target/arm: Create gen_set_rmode, gen_restore_rmode
target/arm: Improve trans_BFCI
target/arm: Avoid tcg_const_ptr in gen_sve_{ldr,str}
target/arm: Avoid tcg_const_* in translate-mve.c
target/arm: Avoid tcg_const_ptr in disas_simd_zip_trn
target/arm: Avoid tcg_const_ptr in handle_vec_simd_sqshrn
target/arm: Avoid tcg_const_ptr in handle_rev
target/avr: Avoid use of tcg_const_i32 in SBIC, SBIS
target/avr: Avoid use of tcg_const_i32 throughout
target/cris: Avoid use of tcg_const_i32 throughout
target/hexagon: Use tcg_constant_* for gen_constant_from_imm
target/hexagon/idef-parser: Use gen_tmp for LPCFG
target/hexagon/idef-parser: Use gen_tmp for gen_pred_assign
target/hexagon/idef-parser: Use gen_tmp for gen_rvalue_pred
target/hexagon/idef-parser: Use gen_constant for
gen_extend_tcg_width_op
target/hppa: Avoid tcg_const_i64 in trans_fid_f
target/hppa: Avoid use of tcg_const_i32 throughout
target/i386: Simplify POPF
target/i386: Avoid use of tcg_const_* throughout
target/m68k: Reject immediate as destination in gen_ea_mode
target/m68k: Use tcg_constant_i32 in gen_ea_mode
target/m68k: Avoid tcg_const_i32 when modified
target/m68k: Avoid tcg_const_i32 in bfop_reg
target/m68k: Avoid tcg_const_* throughout
target/microblaze: Avoid tcg_const_* throughout
target/mips: Split out gen_lxl
target/mips: Split out gen_lxr
target/mips: Avoid tcg_const_tl in gen_r6_ld
target/mips: Avoid tcg_const_* throughout
target/ppc: Split out gen_vx_vmul10
target/ppc: Avoid tcg_const_i64 in do_vector_shift_quad
target/ppc: Avoid tcg_const_i64 in do_vcntmb
target/ppc: Avoid tcg_const_* in vmx-impl.c.inc
target/ppc: Avoid tcg_const_* in xxeval
target/ppc: Avoid tcg_const_* in vsx-impl.c.inc
target/ppc: Avoid tcg_const_* in fp-impl.c.inc
target/ppc: Avoid tcg_const_* in power8-pmu-regs.c.inc
target/ppc: Rewrite trans_ADDG6S
target/ppc: Fix gen_tlbsx_booke206
target/ppc: Avoid tcg_const_* in translate.c
target/riscv: Avoid tcg_const_*
target/rx: Use tcg_gen_abs_i32
target/rx: Use cpu_psw_z as temp in flags computation
target/rx: Avoid tcg_const_i32 when new temp needed
target/rx: Avoid tcg_const_i32
target/s390x: Split out gen_ri2
target/s390x: Avoid tcg_const_i64
target/sh4: Avoid tcg_const_i32 for TAS.B
target/sh4: Avoid tcg_const_i32
tcg/sparc: Avoid tcg_const_tl in gen_edge
target/sparc: Avoid tcg_const_{tl,i32}
target/tricore: Split t_n as constant from temp as variable
target/tricore: Rename t_off10 and use tcg_constant_i32
target/tricore: Use min/max for saturate
target/tricore: Use setcondi instead of explicit allocation
target/tricore: Drop some temp initialization
target/tricore: Avoid tcg_const_i32
target/xtensa: Tidy translate_bb
target/xtensa: Tidy translate_clamps
target/xtensa: Avoid tcg_const_i32 in translate_l32r
target/xtensa: Use tcg_gen_subfi_i32 in translate_sll
target/xtensa: Split constant in bit shift
target/xtensa: Avoid tcg_const_i32
tcg: Replace tcg_const_i64 in tcg-op.c
tcg: Drop tcg_const_*_vec
tcg: Drop tcg_const_*
include/tcg/tcg-op.h | 4 -
include/tcg/tcg.h | 10 -
target/arm/internals.h | 12 +-
target/arm/translate.h | 17 +
target/hexagon/idef-parser/parser-helpers.h | 6 -
target/arm/translate-a64.c | 168 +++----
target/arm/translate-mve.c | 56 +--
target/arm/translate-sve.c | 28 +-
target/arm/translate-vfp.c | 26 +-
target/arm/translate.c | 13 +-
target/arm/vfp_helper.c | 35 +-
target/avr/translate.c | 48 +-
target/cris/translate.c | 46 +-
target/hexagon/idef-parser/parser-helpers.c | 49 +-
target/hppa/translate.c | 35 +-
target/i386/tcg/translate.c | 138 +++---
target/m68k/translate.c | 235 +++++-----
target/microblaze/translate.c | 35 +-
target/mips/tcg/mxu_translate.c | 4 +-
target/mips/tcg/translate.c | 282 +++++-------
target/mips/tcg/tx79_translate.c | 4 +-
target/ppc/translate.c | 148 +++---
target/riscv/translate.c | 4 +-
target/rx/translate.c | 84 ++--
target/s390x/tcg/translate.c | 43 +-
target/sh4/translate.c | 35 +-
target/sparc/translate.c | 94 ++--
target/tricore/translate.c | 476 ++++++++++----------
target/xtensa/translate.c | 50 +-
tcg/tcg-op-vec.c | 34 +-
tcg/tcg-op.c | 12 +-
tcg/tcg.c | 16 -
target/cris/translate_v10.c.inc | 26 +-
target/mips/tcg/micromips_translate.c.inc | 4 +-
target/mips/tcg/nanomips_translate.c.inc | 16 +-
target/ppc/power8-pmu-regs.c.inc | 4 +-
target/ppc/translate/fixedpoint-impl.c.inc | 44 +-
target/ppc/translate/fp-impl.c.inc | 26 +-
target/ppc/translate/vmx-impl.c.inc | 130 +++---
target/ppc/translate/vsx-impl.c.inc | 36 +-
target/riscv/insn_trans/trans_rvv.c.inc | 4 +-
target/riscv/insn_trans/trans_rvzfh.c.inc | 2 +-
tcg/i386/tcg-target.c.inc | 9 +-
target/hexagon/idef-parser/idef-parser.y | 2 +-
44 files changed, 1158 insertions(+), 1392 deletions(-)
--
2.34.1
