Add a dummy implementation of the cp15 registers for the generic timer (found in the Cortex-A15), just sufficient for Linux to decide that it can't use it. This requires at least CNTP_CTL and CNTFRQ to be implemented as RAZ/WI; we RAZ/WI all of c14.
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> --- target-arm/cpu.h | 1 + target-arm/helper.c | 12 ++++++++++-- 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 42c53a7..d71d310 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -382,6 +382,7 @@ enum arm_features { ARM_FEATURE_VAPA, /* cp15 VA to PA lookups */ ARM_FEATURE_ARM_DIV, /* divide supported in ARM encoding */ ARM_FEATURE_VFP4, /* VFPv4 (implies that NEON is v2) */ + ARM_FEATURE_GENERICTIMER, }; static inline int arm_feature(CPUARMState *env, int feature) diff --git a/target-arm/helper.c b/target-arm/helper.c index 00458fc..ecba0c6 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -1762,7 +1762,11 @@ void HELPER(set_cp15)(CPUState *env, uint32_t insn, uint32_t val) goto bad_reg; } break; - case 14: /* Reserved. */ + case 14: /* Generic timer */ + if (arm_feature(env, ARM_FEATURE_GENERICTIMER)) { + /* Dummy implementation: RAZ/WI for all */ + break; + } goto bad_reg; case 15: /* Implementation specific. */ if (arm_feature(env, ARM_FEATURE_XSCALE)) { @@ -2132,7 +2136,11 @@ uint32_t HELPER(get_cp15)(CPUState *env, uint32_t insn) default: goto bad_reg; } - case 14: /* Reserved. */ + case 14: /* Generic timer */ + if (arm_feature(env, ARM_FEATURE_GENERICTIMER)) { + /* Dummy implementation: RAZ/WI for all */ + return 0; + } goto bad_reg; case 15: /* Implementation specific. */ if (arm_feature(env, ARM_FEATURE_XSCALE)) { -- 1.7.1