Signed-off-by: Anthony Liguori <aligu...@us.ibm.com> --- hw/i8254.c | 35 +++-------------------------------- hw/i8254.h | 38 ++++++++++++++++++++++++++++++++++++++ hw/pc.c | 5 +---- hw/piix_pci.c | 15 ++++++++++++++- 4 files changed, 56 insertions(+), 37 deletions(-) create mode 100644 hw/i8254.h
diff --git a/hw/i8254.c b/hw/i8254.c index 522fed8..fa70ff0 100644 --- a/hw/i8254.c +++ b/hw/i8254.c @@ -21,10 +21,9 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "hw.h" + +#include "i8254.h" #include "pc.h" -#include "isa.h" -#include "qemu-timer.h" //#define DEBUG_PIT @@ -33,34 +32,6 @@ #define RW_STATE_WORD0 3 #define RW_STATE_WORD1 4 -typedef struct PITChannelState { - int count; /* can be 65536 */ - uint16_t latched_count; - uint8_t count_latched; - uint8_t status_latched; - uint8_t status; - uint8_t read_state; - uint8_t write_state; - uint8_t write_latch; - uint8_t rw_mode; - uint8_t mode; - uint8_t bcd; /* not supported */ - uint8_t gate; /* timer start */ - int64_t count_load_time; - /* irq handling */ - int64_t next_transition_time; - QEMUTimer *irq_timer; - qemu_irq irq; -} PITChannelState; - -typedef struct PITState { - ISADevice dev; - MemoryRegion ioports; - uint32_t irq; - uint32_t iobase; - PITChannelState channels[3]; -} PITState; - static PITState pit_state; static void pit_irq_timer_update(PITChannelState *s, int64_t current_time); @@ -553,7 +524,7 @@ static void pit_class_initfn(ObjectClass *klass, void *data) } static TypeInfo pit_info = { - .name = "isa-pit", + .name = TYPE_PIT, .parent = TYPE_ISA_DEVICE, .instance_size = sizeof(PITState), .class_init = pit_class_initfn, diff --git a/hw/i8254.h b/hw/i8254.h new file mode 100644 index 0000000..1c3656d --- /dev/null +++ b/hw/i8254.h @@ -0,0 +1,38 @@ +#ifndef QEMU_I8254_H +#define QEMU_I8254_H + +#include "hw.h" +#include "isa.h" +#include "qemu-timer.h" + +#define TYPE_PIT "isa-pit" + +typedef struct PITChannelState { + int count; /* can be 65536 */ + uint16_t latched_count; + uint8_t count_latched; + uint8_t status_latched; + uint8_t status; + uint8_t read_state; + uint8_t write_state; + uint8_t write_latch; + uint8_t rw_mode; + uint8_t mode; + uint8_t bcd; /* not supported */ + uint8_t gate; /* timer start */ + int64_t count_load_time; + /* irq handling */ + int64_t next_transition_time; + QEMUTimer *irq_timer; + qemu_irq irq; +} PITChannelState; + +typedef struct PITState { + ISADevice dev; + MemoryRegion ioports; + uint32_t irq; + uint32_t iobase; + PITChannelState channels[3]; +} PITState; + +#endif diff --git a/hw/pc.c b/hw/pc.c index d3eba63..95dd582 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -1149,16 +1149,13 @@ static void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, int i; DriveInfo *fd[MAX_FD]; qemu_irq *a20_line; - ISADevice *i8042, *port92, *vmmouse, *pit; + ISADevice *i8042, *port92, *vmmouse; qemu_irq *cpu_exit_irq; register_ioport_write(0x80, 1, 1, ioport80_write, NULL); register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL); - pit = pit_init(isa_bus, 0x40, 0); - pcspk_init(pit); - for(i = 0; i < MAX_SERIAL_PORTS; i++) { if (serial_hds[i]) { serial_isa_init(isa_bus, i, serial_hds[i]); diff --git a/hw/piix_pci.c b/hw/piix_pci.c index 5d7d175..4735d9c 100644 --- a/hw/piix_pci.c +++ b/hw/piix_pci.c @@ -32,6 +32,7 @@ #include "xen.h" #include "hpet_emul.h" #include "mc146818rtc.h" +#include "i8254.h" /* * I440FX chipset data sheet. @@ -69,6 +70,7 @@ typedef struct PIIX3State { HPETState hpet; RTCState rtc; + PITState pit; ISABus *bus; @@ -548,6 +550,13 @@ static int piix3_realize(PCIDevice *dev) /* Setup the RTC IRQ */ s->rtc.irq = rtc_irq; + /* Realize the PIT */ + qdev_set_parent_bus(DEVICE(&s->pit), BUS(s->bus)); + qdev_init_nofail(DEVICE(&s->pit)); + + /* FIXME this should be refactored */ + pcspk_init(ISA_DEVICE(&s->pit)); + return 0; } @@ -560,8 +569,12 @@ static void piix3_initfn(Object *obj) object_initialize(&s->rtc, TYPE_RTC); object_property_add_child(obj, "rtc", OBJECT(&s->rtc), NULL); - qdev_prop_set_int32(DEVICE(&s->rtc), "base_year", 2000); + + object_initialize(&s->pit, TYPE_PIT); + object_property_add_child(obj, "pit", OBJECT(&s->pit), NULL); + qdev_prop_set_uint32(DEVICE(&s->pit), "iobase", 0x40); + qdev_prop_set_uint32(DEVICE(&s->pit), "irq", 0); } static void piix3_class_init(ObjectClass *klass, void *data) -- 1.7.4.1