[PATCH 06/16] hw/i3c/aspeed_i3c: Treat more registers as read-as-zero

[Joe Komlodi]

RESET_CTRL and INTR_FORCE are write-only.

Signed-off-by: Joe Komlodi <koml...@google.com>

Reviewed-by: Patrick Venture <vent...@google.com>
---
 hw/i3c/aspeed_i3c.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/hw/i3c/aspeed_i3c.c b/hw/i3c/aspeed_i3c.c
index 6f514bef5e..79715f462d 100644
--- a/hw/i3c/aspeed_i3c.c
+++ b/hw/i3c/aspeed_i3c.c
@@ -420,7 +420,10 @@ static uint64_t aspeed_i3c_device_read(void *opaque, 
hwaddr offset,
     uint64_t value;
 
     switch (addr) {
+    /* RAZ */
     case R_COMMAND_QUEUE_PORT:
+    case R_RESET_CTRL:
+    case R_INTR_FORCE:
         value = 0;
         break;
     default:
-- 
2.40.0.348.gf938b09366-goog