On 4/19/23 20:37, Alistair Francis wrote:
On Tue, Apr 18, 2023 at 12:08 AM Daniel Henrique Barboza
<dbarb...@ventanamicro.com> wrote:
This setter is doing nothing else but setting env->vext_ver. Assign the
value directly.
Signed-off-by: Daniel Henrique Barboza <dbarb...@ventanamicro.com>
Reviewed-by: LIU Zhiwei <zhiwei_...@linux.alibaba.com>
Reviewed-by: Weiwei Li <liwei...@iscas.ac.cn>
I think you dropped my previous reviews
Ops! My bad!
I'll re-send with your acks.
Daniel
Alistair
---
target/riscv/cpu.c | 7 +------
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index feca13aefb..fed7b467e4 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -252,11 +252,6 @@ static void set_priv_version(CPURISCVState *env, int
priv_ver)
env->priv_ver = priv_ver;
}
-static void set_vext_version(CPURISCVState *env, int vext_ver)
-{
- env->vext_ver = vext_ver;
-}
-
#ifndef CONFIG_USER_ONLY
static uint8_t satp_mode_from_str(const char *satp_mode_str)
{
@@ -834,7 +829,7 @@ static void riscv_cpu_validate_v(CPURISCVState *env,
RISCVCPUConfig *cfg,
qemu_log("vector version is not specified, "
"use the default value v1.0\n");
}
- set_vext_version(env, vext_version);
+ env->vext_ver = vext_version;
}
/*
--
2.39.2