On 6/4/23 12:00, Song Gao wrote:
ipi is used to communicate between cpus, this patch modified
loongarch ipi device as percpu deivce, so that there are
2 MemoryRegions with ipi device, rather than 2*cpus
MemoryRegions, which may be large than QDEV_MAX_MMIO if
more cpus are added on loongarch virt machine.
Signed-off-by: Song Gao <gaos...@loongson.cn>
---
hw/intc/loongarch_ipi.c | 32 ++++++++++----------------------
hw/loongarch/virt.c | 12 ++++++------
include/hw/intc/loongarch_ipi.h | 10 ++++------
include/hw/loongarch/virt.h | 1 -
4 files changed, 20 insertions(+), 35 deletions(-)
static const VMStateDescription vmstate_ipi_core = {
@@ -233,7 +223,7 @@ static const VMStateDescription vmstate_ipi_core = {
VMSTATE_UINT32(en, IPICore),
VMSTATE_UINT32(set, IPICore),
VMSTATE_UINT32(clear, IPICore),
- VMSTATE_UINT32_ARRAY(buf, IPICore, MAX_IPI_MBX_NUM * 2),
+ VMSTATE_UINT32_ARRAY(buf, IPICore, 2),
Since this break the migration stream, you should update the version_id.
VMSTATE_END_OF_LIST()
}
};
@@ -243,9 +233,7 @@ static const VMStateDescription vmstate_loongarch_ipi = {
.version_id = 0,
Ditto.
.minimum_version_id = 0,
.fields = (VMStateField[]) {
- VMSTATE_STRUCT_ARRAY(ipi_core, LoongArchMachineState,
- MAX_IPI_CORE_NUM, 0,
- vmstate_ipi_core, IPICore),
+ VMSTATE_STRUCT(ipi_core, LoongArchIPI, 0, vmstate_ipi_core, IPICore),
VMSTATE_END_OF_LIST()
}
};
The rest LGTM.
