Hi Peter, Eric previously mentioned that you might not like the idea. Before we start this big effort, would it possible for you to comment a word or two on this topic?
Thanks! On Mon, Apr 24, 2023 at 04:42:57PM -0700, Nicolin Chen wrote: > Hi all, > > (Please feel free to include related folks into this thread.) > > In light of an ongoing nested-IOMMU support effort via IOMMUFD, we > would likely have a need of a multi-vIOMMU support in QEMU, or more > specificly a multi-vSMMU support for an underlying HW that has multi > physical SMMUs. This would be used in the following use cases. > 1) Multiple physical SMMUs with different feature bits so that one > vSMMU enabling a nesting configuration cannot reflect properly. > 2) NVIDIA Grace CPU has a VCMDQ HW extension for SMMU CMDQ. Every > VCMDQ HW has an MMIO region (CONS and PROD indexes) that should > be exposed to a VM, so that a hypervisor can avoid trappings by > using this HW accelerator for performance. However, one single > vSMMU cannot mmap multiple MMIO regions from multiple pSMMUs. > 3) With the latest iommufd design, a single vIOMMU model shares the > same stage-2 HW pagetable across all physical SMMUs with a shared > VMID. Then a stage-1 pagetable invalidation (for one device) at > the vSMMU would have to be broadcasted to all the SMMU instances, > which would hurt the overall performance. > > I previously discussed with Eric this topic in a private email. Eric > felt the difficulty of implementing this in the current QEMU system, > as it would touch different subsystems like IORT and platform device, > since the passthrough devices would be attached to different vIOMMUs. > > Yet, given the situations above, it's likely the best by duplicating > the vIOMMU instance corresponding to the number of the physical SMMU > instances. > > So, I am sending this email to collect opinions on this and see what > would be a potential TODO list if we decide to go on this path. > > Thanks > Nicolin