On 21/5/23 13:00, Jiaxun Yang wrote:
Previous implementation of MIPS cp0_timer computes a
cp0_count_ns based on input clock. However rounding
error of cp0_count_ns can affect precision of cp0_timer.
Using clock API and a divider for cp0_timer, so we can
use clock_ns_to_ticks/clock_ns_to_ticks to avoid rounding
issue.
Also workaround the situation that in such handler flow:
count = read_c0_count()
write_c0_compare(count)
If timer had not progressed when compare was written, the
interrupt would trigger again.
Signed-off-by: Jiaxun Yang <jiaxun.y...@flygoat.com>
---
This seems fixed MTTCG booting issue on malta 5kEc with SMP.
I'm going to do more test and see if we can enable MTTCG for
mips64el.
---
target/mips/cpu.c | 8 +++++---
target/mips/cpu.h | 3 ++-
target/mips/sysemu/cp0_timer.c | 35 ++++++++++++++++++----------------
3 files changed, 26 insertions(+), 20 deletions(-)
Nice!
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
