On Wed, May 24, 2023 at 12:07 AM Weiwei Li <liwei...@iscas.ac.cn> wrote: > > pc_succ_insn is no longer useful after the introduce of cur_insn_len > and all pc related value use diff value instead of absolute value. > > Signed-off-by: Weiwei Li <liwei...@iscas.ac.cn> > Signed-off-by: Junqiang Wang <wangjunqi...@iscas.ac.cn>
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com> Alistair > --- > target/riscv/translate.c | 7 +------ > 1 file changed, 1 insertion(+), 6 deletions(-) > > diff --git a/target/riscv/translate.c b/target/riscv/translate.c > index 538187f93b..37d731f9c5 100644 > --- a/target/riscv/translate.c > +++ b/target/riscv/translate.c > @@ -57,8 +57,6 @@ typedef enum { > > typedef struct DisasContext { > DisasContextBase base; > - /* pc_succ_insn points to the instruction following base.pc_next */ > - target_ulong pc_succ_insn; > target_ulong cur_insn_len; > target_ulong pc_save; > target_ulong priv_ver; > @@ -1147,7 +1145,6 @@ static void decode_opc(CPURISCVState *env, DisasContext > *ctx, uint16_t opcode) > /* Check for compressed insn */ > if (ctx->cur_insn_len == 2) { > ctx->opcode = opcode; > - ctx->pc_succ_insn = ctx->base.pc_next + 2; > /* > * The Zca extension is added as way to refer to instructions in the > C > * extension that do not include the floating-point loads and stores > @@ -1161,7 +1158,6 @@ static void decode_opc(CPURISCVState *env, DisasContext > *ctx, uint16_t opcode) > translator_lduw(env, &ctx->base, > ctx->base.pc_next + 2)); > ctx->opcode = opcode32; > - ctx->pc_succ_insn = ctx->base.pc_next + 4; > > for (size_t i = 0; i < ARRAY_SIZE(decoders); ++i) { > if (decoders[i].guard_func(ctx) && > @@ -1182,7 +1178,6 @@ static void > riscv_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) > uint32_t tb_flags = ctx->base.tb->flags; > > ctx->pc_save = ctx->base.pc_first; > - ctx->pc_succ_insn = ctx->base.pc_first; > ctx->priv = FIELD_EX32(tb_flags, TB_FLAGS, PRIV); > ctx->mem_idx = FIELD_EX32(tb_flags, TB_FLAGS, MEM_IDX); > ctx->mstatus_fs = FIELD_EX32(tb_flags, TB_FLAGS, FS); > @@ -1235,7 +1230,7 @@ static void riscv_tr_translate_insn(DisasContextBase > *dcbase, CPUState *cpu) > > ctx->ol = ctx->xl; > decode_opc(env, ctx, opcode16); > - ctx->base.pc_next = ctx->pc_succ_insn; > + ctx->base.pc_next += ctx->cur_insn_len; > > /* Only the first insn within a TB is allowed to cross a page boundary. > */ > if (ctx->base.is_jmp == DISAS_NEXT) { > -- > 2.25.1 > >