On Wed, May 24, 2023 at 12:15 AM Weiwei Li <liwei...@iscas.ac.cn> wrote: > > This patchset tries to add support for PC-relative translation. > > The existence of CF_PCREL can improve performance with the guest > kernel's address space randomization. Each guest process maps libc.so > (et al) at a different virtual address, and this allows those > translations to be shared. > > And support of PC-relative translation is the precondition to support > pointer mask for instruction. > > The port is available here: > https://github.com/plctlab/plct-qemu/tree/plct-pcrel-upstream-v2 > > v2: > * rebase on upstream and add pc-relative translation for Zc* instructions > > Weiwei Li (7): > target/riscv: Fix target address to update badaddr > target/riscv: Introduce cur_insn_len into DisasContext > target/riscv: Change gen_goto_tb to work on displacements > target/riscv: Change gen_set_pc_imm to gen_update_pc > target/riscv: Use true diff for gen_pc_plus_diff > target/riscv: Enable PC-relative translation > target/riscv: Remove pc_succ_insn from DisasContext
Thanks for the patches. Do you mind rebasing on https://github.com/alistair23/qemu/tree/riscv-to-apply.next ? Alistair > > target/riscv/cpu.c | 31 ++++-- > .../riscv/insn_trans/trans_privileged.c.inc | 2 +- > target/riscv/insn_trans/trans_rvi.c.inc | 43 ++++++--- > target/riscv/insn_trans/trans_rvv.c.inc | 4 +- > target/riscv/insn_trans/trans_rvzawrs.c.inc | 2 +- > target/riscv/insn_trans/trans_rvzce.c.inc | 10 +- > target/riscv/insn_trans/trans_xthead.c.inc | 2 +- > target/riscv/translate.c | 94 ++++++++++++------- > 8 files changed, 123 insertions(+), 65 deletions(-) > > -- > 2.25.1 > >
