Hi Philippe, thanks for reviewing my patch.
Philippe Mathieu-Daudé (phi...@linaro.org) wrote: > Shouldn't we mask this bit for interruptions now? yes, we should support interrupts from the wake bit. I'll add your snippet and send a v2. Thanks, Martin > -- >8 -- > diff --git a/include/hw/char/imx_serial.h b/include/hw/char/imx_serial.h > index 91c9894ad5..b823f94519 100644 > --- a/include/hw/char/imx_serial.h > +++ b/include/hw/char/imx_serial.h > @@ -71,6 +71,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(IMXSerialState, IMX_SERIAL) > #define UCR4_DREN BIT(0) /* Receive Data Ready interrupt enable */ > #define UCR4_TCEN BIT(3) /* TX complete interrupt enable */ > +#define UCR4_WKEN BIT(7) /* WAKE interrupt enable */ > #define UTS1_TXEMPTY (1<<6) > #define UTS1_RXEMPTY (1<<5) > diff --git a/hw/char/imx_serial.c b/hw/char/imx_serial.c > index ee1375e26d..c8ec247350 100644 > --- a/hw/char/imx_serial.c > +++ b/hw/char/imx_serial.c > @@ -80,7 +80,7 @@ static void imx_update(IMXSerialState *s) > * TCEN and TXDC are both bit 3 > * RDR and DREN are both bit 0 > */ > - mask |= s->ucr4 & (UCR4_TCEN | UCR4_DREN); > + mask |= s->ucr4 & (UCR4_WKEN | UCR4_TCEN | UCR4_DREN); > usr2 = s->usr2 & mask; > ---
