This patch includes:
- XV{AND/OR/XOR/NOR/ANDN/ORN}.V;
- XV{AND/OR/XOR/NOR}I.B.
Signed-off-by: Song Gao <gaos...@loongson.cn>
---
target/loongarch/disas.c | 12 ++++++
target/loongarch/helper.h | 2 +
target/loongarch/insn_trans/trans_lasx.c.inc | 42 ++++++++++++++++++++
target/loongarch/insns.decode | 13 ++++++
target/loongarch/lasx_helper.c | 11 +++++
5 files changed, 80 insertions(+)
diff --git a/target/loongarch/disas.c b/target/loongarch/disas.c
index 82a9826eb7..2f1da9db80 100644
--- a/target/loongarch/disas.c
+++ b/target/loongarch/disas.c
@@ -2028,6 +2028,18 @@ INSN_LASX(xvmsknz_b, xx)
INSN_LASX(xvldi, x_i)
+INSN_LASX(xvand_v, xxx)
+INSN_LASX(xvor_v, xxx)
+INSN_LASX(xvxor_v, xxx)
+INSN_LASX(xvnor_v, xxx)
+INSN_LASX(xvandn_v, xxx)
+INSN_LASX(xvorn_v, xxx)
+
+INSN_LASX(xvandi_b, xx_i)
+INSN_LASX(xvori_b, xx_i)
+INSN_LASX(xvxori_b, xx_i)
+INSN_LASX(xvnori_b, xx_i)
+
INSN_LASX(xvreplgr2vr_b, xr)
INSN_LASX(xvreplgr2vr_h, xr)
INSN_LASX(xvreplgr2vr_w, xr)
diff --git a/target/loongarch/helper.h b/target/loongarch/helper.h
index b7ba78ee06..4e0a900318 100644
--- a/target/loongarch/helper.h
+++ b/target/loongarch/helper.h
@@ -929,3 +929,5 @@ DEF_HELPER_3(xvmskltz_w, void, env, i32, i32)
DEF_HELPER_3(xvmskltz_d, void, env, i32, i32)
DEF_HELPER_3(xvmskgez_b, void, env, i32, i32)
DEF_HELPER_3(xvmsknz_b, void, env, i32, i32)
+
+DEF_HELPER_FLAGS_4(xvnori_b, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32)
diff --git a/target/loongarch/insn_trans/trans_lasx.c.inc
b/target/loongarch/insn_trans/trans_lasx.c.inc
index bf277e1fd9..d48f76f118 100644
--- a/target/loongarch/insn_trans/trans_lasx.c.inc
+++ b/target/loongarch/insn_trans/trans_lasx.c.inc
@@ -1935,6 +1935,48 @@ static bool trans_xvldi(DisasContext *ctx, arg_xvldi * a)
return true;
}
+TRANS(xvand_v, gvec_xxx, MO_64, tcg_gen_gvec_and)
+TRANS(xvor_v, gvec_xxx, MO_64, tcg_gen_gvec_or)
+TRANS(xvxor_v, gvec_xxx, MO_64, tcg_gen_gvec_xor)
+TRANS(xvnor_v, gvec_xxx, MO_64, tcg_gen_gvec_nor)
+
+static bool trans_xvandn_v(DisasContext *ctx, arg_xxx * a)
+{
+ uint32_t xd_ofs, xj_ofs, xk_ofs;
+
+ CHECK_ASXE;
+
+ xd_ofs = vec_full_offset(a->xd);
+ xj_ofs = vec_full_offset(a->xj);
+ xk_ofs = vec_full_offset(a->xk);
+
+ tcg_gen_gvec_andc(MO_64, xd_ofs, xk_ofs, xj_ofs, 32, ctx->vl / 8);
+ return true;
+}
+TRANS(xvorn_v, gvec_xxx, MO_64, tcg_gen_gvec_orc)
+TRANS(xvandi_b, gvec_xx_i, MO_8, tcg_gen_gvec_andi)
+TRANS(xvori_b, gvec_xx_i, MO_8, tcg_gen_gvec_ori)
+TRANS(xvxori_b, gvec_xx_i, MO_8, tcg_gen_gvec_xori)
+
+static void do_xvnori_b(unsigned vece, uint32_t xd_ofs, uint32_t xj_ofs,
+ int64_t imm, uint32_t oprsz, uint32_t maxsz)
+{
+ static const TCGOpcode vecop_list[] = {
+ INDEX_op_nor_vec, 0
+ };
+ static const GVecGen2i op = {
+ .fni8 = gen_vnori_b,
+ .fniv = gen_vnori,
+ .fnoi = gen_helper_xvnori_b,
+ .opt_opc = vecop_list,
+ .vece = MO_8
+ };
+
+ tcg_gen_gvec_2i(xd_ofs, xj_ofs, oprsz, maxsz, imm, &op);
+}
+
+TRANS(xvnori_b, gvec_xx_i, MO_8, do_xvnori_b)
+
static bool gvec_dupx(DisasContext *ctx, arg_xr *a, MemOp mop)
{
TCGv src = gpr_src(ctx, a->rj, EXT_NONE);
diff --git a/target/loongarch/insns.decode b/target/loongarch/insns.decode
index fbd0dd229a..ce2ad47b88 100644
--- a/target/loongarch/insns.decode
+++ b/target/loongarch/insns.decode
@@ -1320,6 +1320,7 @@ vstelm_b 0011 000110 .... ........ ..... .....
@vr_i8i4
@xx_ui4 .... ........ ..... . imm:4 xj:5 xd:5 &xx_i
@xx_ui5 .... ........ ..... imm:5 xj:5 xd:5 &xx_i
@xx_ui6 .... ........ .... imm:6 xj:5 xd:5 &xx_i
+@xx_ui8 .... ........ .. imm:8 xj:5 xd:5 &xx_i
xvadd_b 0111 01000000 10100 ..... ..... ..... @xxx
xvadd_h 0111 01000000 10101 ..... ..... ..... @xxx
@@ -1628,6 +1629,18 @@ xvmsknz_b 0111 01101001 11000 11000 ..... .....
@xx
xvldi 0111 01111110 00 ............. ..... @x_i13
+xvand_v 0111 01010010 01100 ..... ..... ..... @xxx
+xvor_v 0111 01010010 01101 ..... ..... ..... @xxx
+xvxor_v 0111 01010010 01110 ..... ..... ..... @xxx
+xvnor_v 0111 01010010 01111 ..... ..... ..... @xxx
+xvandn_v 0111 01010010 10000 ..... ..... ..... @xxx
+xvorn_v 0111 01010010 10001 ..... ..... ..... @xxx
+
+xvandi_b 0111 01111101 00 ........ ..... ..... @xx_ui8
+xvori_b 0111 01111101 01 ........ ..... ..... @xx_ui8
+xvxori_b 0111 01111101 10 ........ ..... ..... @xx_ui8
+xvnori_b 0111 01111101 11 ........ ..... ..... @xx_ui8
+
xvreplgr2vr_b 0111 01101001 11110 00000 ..... ..... @xr
xvreplgr2vr_h 0111 01101001 11110 00001 ..... ..... @xr
xvreplgr2vr_w 0111 01101001 11110 00010 ..... ..... @xr
diff --git a/target/loongarch/lasx_helper.c b/target/loongarch/lasx_helper.c
index 6aec554645..8e8860c1bb 100644
--- a/target/loongarch/lasx_helper.c
+++ b/target/loongarch/lasx_helper.c
@@ -804,3 +804,14 @@ void HELPER(xvmsknz_b)(CPULoongArchState *env, uint32_t
xd, uint32_t xj)
Xd->XD(2 * i + 1) = 0;
}
}
+
+void HELPER(xvnori_b)(void *xd, void *xj, uint64_t imm, uint32_t v)
+{
+ int i;
+ XReg *Xd = (XReg *)xd;
+ XReg *Xj = (XReg *)xj;
+
+ for (i = 0; i < LASX_LEN / 8; i++) {
+ Xd->XB(i) = ~(Xj->XB(i) | (uint8_t)imm);
+ }
+}
--
2.39.1
