On Wed, 26 Jul 2023 at 15:22, Sergey Kambalin <serg.o...@gmail.com> wrote:
>
> Signed-off-by: Sergey Kambalin <sergey.kamba...@auriga.com>
> ---
> hw/arm/bcm2838.c | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/hw/arm/bcm2838.c b/hw/arm/bcm2838.c
> index a1980cc181..83bfbc2cae 100644
> --- a/hw/arm/bcm2838.c
> +++ b/hw/arm/bcm2838.c
> @@ -217,6 +217,10 @@ static void bcm2838_realize(DeviceState *dev, Error
> **errp)
> sysbus_connect_irq(SYS_BUS_DEVICE(&ps_base->dwc2), 0,
> qdev_get_gpio_in(gicdev, GIC_SPI_INTERRUPT_DWC2));
>
> + /* Connect RNG200 to the interrupt controller */
> + sysbus_connect_irq(SYS_BUS_DEVICE(&ps->rng200), 0,
> + qdev_get_gpio_in(gicdev, GIC_SPI_INTERRUPT_RNG200));
> +
> /* Connect DMA 0-6 to the interrupt controller */
> for (int_n = GIC_SPI_INTERRUPT_DMA_0; int_n <= GIC_SPI_INTERRUPT_DMA_6;
> int_n++) {
> @@ -239,6 +243,21 @@ static void bcm2838_realize(DeviceState *dev, Error
> **errp)
> qdev_connect_gpio_out(dma_9_10_irq_orgate, 0,
> qdev_get_gpio_in(gicdev,
> GIC_SPI_INTERRUPT_DMA_9_10));
>
> + /* Connect PCIe host bridge to the interrupt controller */
> + for (n = 0; n < BCM2838_PCIE_NUM_IRQS; n++) {
> + int_n = GIC_SPI_INTERRUPT_PCI_INT_A + n;
> + sysbus_connect_irq(SYS_BUS_DEVICE(&ps->pcie_host), n,
> + qdev_get_gpio_in(gicdev, int_n));
> + bcm2838_pcie_host_set_irq_num(BCM2838_PCIE_HOST(&ps->pcie_host), n,
> + int_n);
> + }
> +
> + /* Connect Gigabit Ethernet controller to the interrupt controller */
> + sysbus_connect_irq(SYS_BUS_DEVICE(&ps->genet), 0,
> + qdev_get_gpio_in(gicdev, GIC_SPI_INTERRUPT_GENET_A));
> + sysbus_connect_irq(SYS_BUS_DEVICE(&ps->genet), 1,
> + qdev_get_gpio_in(gicdev, GIC_SPI_INTERRUPT_GENET_B));
I would be inclined to have the "connect device foo to the interrupt
controller" code change in the same patch that does "add device
foo to the board", but the code changes here are OK.
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
thanks
-- PMM
