Add la132 as a loongarch32 cpu type and allow virt machine to be used with la132 instead of la464.
Signed-off-by: Jiajie Chen <c...@jia.je> --- hw/loongarch/virt.c | 5 ----- target/loongarch/cpu.c | 41 +++++++++++++++++++++++++++++++++++++++++ target/loongarch/cpu.h | 11 +++++++++++ 3 files changed, 52 insertions(+), 5 deletions(-) diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index e19b042ce8..af15bf5aaa 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -798,11 +798,6 @@ static void loongarch_init(MachineState *machine) cpu_model = LOONGARCH_CPU_TYPE_NAME("la464"); } - if (!strstr(cpu_model, "la464")) { - error_report("LoongArch/TCG needs cpu type la464"); - exit(1); - } - if (ram_size < 1 * GiB) { error_report("ram_size must be greater than 1G."); exit(1); diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index ad93ecac92..d31efe86da 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -362,6 +362,8 @@ static void loongarch_la464_initfn(Object *obj) CPULoongArchState *env = &cpu->env; int i; + env->mode = LA64; + for (i = 0; i < 21; i++) { env->cpucfg[i] = 0x0; } @@ -439,6 +441,20 @@ static void loongarch_la464_initfn(Object *obj) env->CSR_ASID = FIELD_DP64(0, CSR_ASID, ASIDBITS, 0xa); } +static void loongarch_la132_initfn(Object *obj) +{ + LoongArchCPU *cpu = LOONGARCH_CPU(obj); + CPULoongArchState *env = &cpu->env; + + env->mode = LA32; + + cpu->dtb_compatible = "loongarch,Loongson-3C103"; + + uint32_t data = 0; + data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */ + env->cpucfg[1] = data; +} + static void loongarch_cpu_list_entry(gpointer data, gpointer user_data) { const char *typename = object_class_get_name(OBJECT_CLASS(data)); @@ -732,6 +748,10 @@ static void loongarch_cpu_class_init(ObjectClass *c, void *data) #endif } +static void loongarch32_cpu_class_init(ObjectClass *c, void *data) +{ +} + #define DEFINE_LOONGARCH_CPU_TYPE(model, initfn) \ { \ .parent = TYPE_LOONGARCH_CPU, \ @@ -754,3 +774,24 @@ static const TypeInfo loongarch_cpu_type_infos[] = { }; DEFINE_TYPES(loongarch_cpu_type_infos) + +#define DEFINE_LOONGARCH32_CPU_TYPE(model, initfn) \ + { \ + .parent = TYPE_LOONGARCH32_CPU, \ + .instance_init = initfn, \ + .name = LOONGARCH_CPU_TYPE_NAME(model), \ + } + +static const TypeInfo loongarch32_cpu_type_infos[] = { + { + .name = TYPE_LOONGARCH32_CPU, + .parent = TYPE_LOONGARCH_CPU, + .instance_size = sizeof(LoongArchCPU), + + .abstract = true, + .class_size = sizeof(LoongArchCPUClass), + .class_init = loongarch32_cpu_class_init, + }, + DEFINE_LOONGARCH32_CPU_TYPE("la132", loongarch_la132_initfn), +}; +DEFINE_TYPES(loongarch32_cpu_type_infos) diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index 43c73e6363..f1907cddc5 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -404,6 +404,17 @@ struct LoongArchCPUClass { ResettablePhases parent_phases; }; +#define TYPE_LOONGARCH32_CPU "loongarch32-cpu" +typedef struct LoongArch32CPUClass LoongArch32CPUClass; +DECLARE_CLASS_CHECKERS(LoongArch32CPUClass, LOONGARCH32_CPU, + TYPE_LOONGARCH32_CPU) + +struct LoongArch32CPUClass { + /*< private >*/ + LoongArchCPUClass parent_class; + /*< public >*/ +}; + /* * LoongArch CPUs has 4 privilege levels. * 0 for kernel mode, 3 for user mode. -- 2.39.2