David L. Mills wrote: > David, > > The multiple-CPU nanokernel code that left here and is in the Alpha > kernel assumes each CPU has an individual cycle counter and the timer > interupts are vectored to a designated CPU. There is a data structure > associated with each CPU that holds the measured current cycle counter > scaling and offset, which is updated once each second by > interprocessor interrrupt. A call to read the system clock lands on a > j-random CPU, which reads the global time maintained by timer > interrupts and interpolates according to the current CPU values. > > I don't know if Vista attempts to provide granularity within the tick; > but if it does, I would expect it to use a similar strategy. > > Dave
Thanks for that, Dave. I haven't needed to touch assembler for a little wile now, so I'm not up to speed on whether the various Intel and AMD architectures (hyper-threading, dual/quad-core, and physical multi-processor etc.) provide access to every cycle counter from a single CPU or executing thread. The Windows implementation does try to provide granularity within the tick, but I have no idea how the Meinberg port I'm using handles multi-processors. Checking. I see the routine: nt_clockstuff.c mentions that how to handle multi-processors is not yet decided, but that seems very old code (year 2000). I can't find the RDTSC instruction anywhere in version ntp-4.2.4p4. So I'm a bit stuck right now! Cheers, David _______________________________________________ questions mailing list questions@lists.ntp.org https://lists.ntp.org/mailman/listinfo/questions
