| Date: Wed, 23 Sep 2009 10:52:22 -0700 | From: Brian Harvey <[email protected]> | | > A single-precision float and its type header fits within a | > cons-cell, which saves space compared to a boxed double-precision | > float. | | Do these constant-factor space optimizations still matter to | anybody in these days when I have 16 Gb in my cell phone?
Yes it does! A boxed datatype requires pulling in another cache-line. Not only must the CPU wait for the fetch, using up cache-lines reduces the data bandwidth to my always cache-starved Pentium-4. If I ever become employed again, I hope to buy a computer with a much larger cache. It looks like Intel has finally started putting larger caches into their CPUs (at least Duo-core). | It's not like, e.g., tail call elimination, which is an | order-of-growth space optimization. | | I'm guessing you have to expand that short float into a long float | before you do arithmetic on it, anyway, right? On the Pentium-4 all FP registers are 80-bit. Double-floats and single-floats are converted to 80-bit when loaded into a FP register. I would be surprised if loading a short float took any more time than loading a long float. They are both probably single cycle operations. As for SCM, it doesn't convert single to double explicitly for type-dispatched numerical operations; it leaves it to the C compiler. _______________________________________________ r6rs-discuss mailing list [email protected] http://lists.r6rs.org/cgi-bin/mailman/listinfo/r6rs-discuss
