Matthew Flatt <[email protected]> writes: > At Fri, 17 Jan 2020 09:43:15 -0400, David Bremner wrote: >> Matthew Flatt <[email protected]> writes: >> > At Fri, 17 Jan 2020 08:31:22 -0400, David Bremner wrote: >> >> => 0xb6ea3254 <+8>: stmdb sp!, {r4, r5, r6, r7, r8, r9, r10, r11, >> >> lr} >> >> 0xb6ea3258 <+12>: add r3, pc >> > >> > That certainly looks like a valid ARM instruction. Maybe the processor >> > is expecting Thumb instructions. What does `print $cpsr` report? >> >> (gdb) print $cpsr >> $3 = 196656 > > Since bit 5 is set, I think that means the processor was expecting > Thumb instructions, which at least explains the error. > > To confirm that it's some bad jump or mismanagement of the mode by the > Racket JIT, does changing "racket/src/lightning/arm/asm.h" to disable > Thumb support allow the build to work?
I'm not very sure I'm doing the right thing, but With the following change, I get the same build failure. % diff -u asm.h~ asm.h --- asm.h~ 2019-12-30 19:12:36.000000000 +0000 +++ asm.h 2020-01-17 16:06:45.964573092 +0000 @@ -2299,4 +2299,7 @@ #define THUMB2_CLZ 0xfab0f080 #define T2_CLZ(rd,rm) thumb2_orrr(THUMB2_CLZ,rd,rm,rm) +# undef JIT_ARM_THUMB +# define JIT_ARM_THUMB 0 + #endif /* __lightning_asm_h */ -- You received this message because you are subscribed to the Google Groups "Racket Developers" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/d/msgid/racket-dev/87imlax8t4.fsf%40tethera.net.
