>It's really not hard to put object files in a subdirectory.
>Your makefile is using an implicit rule to compile C files which looks
>something like:
>
>%.o : %.c
> $(CC) -c $(CPPFLAGS) $(CFLAGS) -o $@ $<
>
>You simply need to add a rule similar to this one except using the
>subdirectory:
>
>objs/%.o : %.c
> $(CC) -c $(CPPFLAGS) $(CFLAGS) -o $@ $<
This is all well and good, but it causes problems if you are using gcc built in
dependacy generater options...
$(CC) -MM $(C_FILES) $(CFLAGS) > .depend
Because it will output the files as:
main.o: main.c includes/config.h
But in reality it should be:
$(OBJDIR)/main.o: main.c includes/config.h
I wrote a quick and dirty hack to make the .depend file correct when doing a
make depend with the depend target specified in the make file as follows.
include .depend
depend:
$(CC) -MM $(C_FILES) $(CFLAGS) > .depend
cat .depend | sed 's/^\(.*\):/$(OBJDIR)\/\1:/' > .depend
(Be sure to touch the .depend file in your source dir before running make the
first time) This will do the substitions, and allow you to lower your build
times by only making the files that need it.
~Kender
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