https://git.reactos.org/?p=reactos.git;a=commitdiff;h=d01518da7cebdf87cc38eefdff70aefa289b2f95
commit d01518da7cebdf87cc38eefdff70aefa289b2f95 Author: Victor Perevertkin <[email protected]> AuthorDate: Thu Sep 24 22:30:52 2020 +0300 Commit: Victor Perevertkin <[email protected]> CommitDate: Thu Sep 24 22:30:52 2020 +0300 [XDK] Add definitions required for newer storage class drivers (cdrom) That introduced some warnings in the current code which were corrected as well CORE-17129 --- drivers/storage/class/ramdisk/ramdisk.c | 1 + ntoskrnl/mm/ARM3/mdlsup.c | 2 +- sdk/include/ndk/mmtypes.h | 6 + sdk/include/xdk/exfuncs.h | 50 ++++ sdk/include/xdk/extypes.h | 46 +++ sdk/include/xdk/iotypes.h | 480 +++++++++++++++++++++++++++++++- sdk/include/xdk/ketypes.h | 6 + sdk/include/xdk/mmfuncs.h | 7 +- sdk/include/xdk/potypes.h | 276 +++++++++++++++++- 9 files changed, 864 insertions(+), 10 deletions(-) diff --git a/drivers/storage/class/ramdisk/ramdisk.c b/drivers/storage/class/ramdisk/ramdisk.c index 4f910eff5be..987d0ffc6fd 100644 --- a/drivers/storage/class/ramdisk/ramdisk.c +++ b/drivers/storage/class/ramdisk/ramdisk.c @@ -1733,6 +1733,7 @@ RamdiskQueryId(IN PRAMDISK_DRIVE_EXTENSION DriveExtension, } case BusQueryDeviceSerialNumber: + case BusQueryContainerID: { /* Nothing to do */ break; diff --git a/ntoskrnl/mm/ARM3/mdlsup.c b/ntoskrnl/mm/ARM3/mdlsup.c index 4975b3edc8b..10a2aa02f68 100644 --- a/ntoskrnl/mm/ARM3/mdlsup.c +++ b/ntoskrnl/mm/ARM3/mdlsup.c @@ -666,7 +666,7 @@ MmMapLockedPagesSpecifyCache(IN PMDL Mdl, IN MEMORY_CACHING_TYPE CacheType, IN PVOID BaseAddress, IN ULONG BugCheckOnFailure, - IN MM_PAGE_PRIORITY Priority) + IN ULONG Priority) // MM_PAGE_PRIORITY { PVOID Base; PPFN_NUMBER MdlPages, LastPage; diff --git a/sdk/include/ndk/mmtypes.h b/sdk/include/ndk/mmtypes.h index a19b5f1ee60..ca62ebdf5ce 100644 --- a/sdk/include/ndk/mmtypes.h +++ b/sdk/include/ndk/mmtypes.h @@ -125,6 +125,12 @@ typedef enum _POOL_TYPE PagedPoolCacheAligned, NonPagedPoolCacheAlignedMustS, MaxPoolType, + + NonPagedPoolBase = 0, + NonPagedPoolBaseMustSucceed = NonPagedPoolBase + 2, + NonPagedPoolBaseCacheAligned = NonPagedPoolBase + 4, + NonPagedPoolBaseCacheAlignedMustS = NonPagedPoolBase + 6, + NonPagedPoolSession = 32, PagedPoolSession, NonPagedPoolMustSucceedSession, diff --git a/sdk/include/xdk/exfuncs.h b/sdk/include/xdk/exfuncs.h index 1f9a1ad6a97..2d0c2332f2b 100644 --- a/sdk/include/xdk/exfuncs.h +++ b/sdk/include/xdk/exfuncs.h @@ -950,6 +950,56 @@ ExLocalTimeToSystemTime( _In_ PLARGE_INTEGER LocalTime, _Out_ PLARGE_INTEGER SystemTime); +#if (NTDDI_VERSION >= NTDDI_WINBLUE) + +#define EX_TIMER_HIGH_RESOLUTION 0x4 +#define EX_TIMER_NO_WAKE 0x8 +#define EX_TIMER_UNLIMITED_TOLERANCE ((LONGLONG)-1) +#define EX_TIMER_NOTIFICATION (1UL << 31) + +NTKERNELAPI +PEX_TIMER +NTAPI +ExAllocateTimer( + _In_opt_ PEXT_CALLBACK Callback, + _In_opt_ PVOID CallbackContext, + _In_ ULONG Attributes); + +NTKERNELAPI +BOOLEAN +NTAPI +ExSetTimer( + _In_ PEX_TIMER Timer, + _In_ LONGLONG DueTime, + _In_ LONGLONG Period, + _In_opt_ PEXT_SET_PARAMETERS Parameters); + +NTKERNELAPI +BOOLEAN +NTAPI +ExCancelTimer( + _Inout_ PEX_TIMER Timer, + _In_opt_ PEXT_CANCEL_PARAMETERS Parameters); + +NTKERNELAPI +BOOLEAN +NTAPI +ExDeleteTimer( + _In_ PEX_TIMER Timer, + _In_ BOOLEAN Cancel, + _In_ BOOLEAN Wait, + _In_opt_ PEXT_DELETE_PARAMETERS Parameters); + +FORCEINLINE +VOID +ExInitializeSetTimerParameters( + _Out_ PEXT_SET_PARAMETERS Parameters) +{ + ASSERT(FALSE); +} + +#endif // NTDDI_WINBLUE + _IRQL_requires_max_(DISPATCH_LEVEL) NTKERNELAPI VOID diff --git a/sdk/include/xdk/extypes.h b/sdk/include/xdk/extypes.h index 548dceee203..a8c5fa87dc2 100644 --- a/sdk/include/xdk/extypes.h +++ b/sdk/include/xdk/extypes.h @@ -277,6 +277,52 @@ extern NTKERNELAPI ULONG NtGlobalFlag; #define IF_NTOS_DEBUG(FlagName) if(FALSE) #endif +#if (NTDDI_VERSION >= NTDDI_WINBLUE) + +typedef struct _EXT_SET_PARAMETERS_V0 +{ + ULONG Version; + ULONG Reserved; + LONGLONG NoWakeTolerance; +} EXT_SET_PARAMETERS, *PEXT_SET_PARAMETERS; + +typedef EXT_SET_PARAMETERS KT2_SET_PARAMETERS, *PKT2_SET_PARAMETERS; + +typedef struct _EX_TIMER *PEX_TIMER; + +_Function_class_(EXT_CALLBACK) +_IRQL_requires_(DISPATCH_LEVEL) +_IRQL_requires_same_ +typedef +VOID +NTAPI +EXT_CALLBACK( + _In_ PEX_TIMER Timer, + _In_opt_ PVOID Context); + +typedef EXT_CALLBACK *PEXT_CALLBACK; + +_Function_class_(EXT_DELETE_CALLBACK) +_IRQL_requires_(DISPATCH_LEVEL) +_IRQL_requires_same_ +typedef +VOID +NTAPI +EXT_DELETE_CALLBACK( + _In_opt_ PVOID Context); + +typedef EXT_DELETE_CALLBACK *PEXT_DELETE_CALLBACK; +typedef PVOID PEXT_CANCEL_PARAMETERS; +typedef struct _EXT_DELETE_PARAMETERS +{ + ULONG Version; + ULONG Reserved; + PEXT_DELETE_CALLBACK DeleteCallback; + PVOID DeleteContext; +} EXT_DELETE_PARAMETERS, *PEXT_DELETE_PARAMETERS; + +#endif // NTDDI_WINBLUE + $endif (_WDMDDK_) $if (_NTDDK_) typedef struct _ZONE_SEGMENT_HEADER { diff --git a/sdk/include/xdk/iotypes.h b/sdk/include/xdk/iotypes.h index d53d9371532..d1392e0857a 100644 --- a/sdk/include/xdk/iotypes.h +++ b/sdk/include/xdk/iotypes.h @@ -119,7 +119,7 @@ $if (_WDMDDK_) typedef USHORT IRQ_DEVICE_POLICY, *PIRQ_DEVICE_POLICY; -typedef enum _IRQ_DEVICE_POLICY_USHORT { +enum _IRQ_DEVICE_POLICY_USHORT { IrqPolicyMachineDefault = 0, IrqPolicyAllCloseProcessors = 1, IrqPolicyOneCloseProcessor = 2, @@ -392,6 +392,17 @@ typedef struct _IO_DISCONNECT_INTERRUPT_PARAMETERS { } ConnectionContext; } IO_DISCONNECT_INTERRUPT_PARAMETERS, *PIO_DISCONNECT_INTERRUPT_PARAMETERS; +typedef struct _IO_REPORT_INTERRUPT_ACTIVE_STATE_PARAMETERS +{ + ULONG Version; + union + { + PVOID Generic; + PKINTERRUPT InterruptObject; + PIO_INTERRUPT_MESSAGE_INFO InterruptMessageTable; + } ConnectionContext; +} IO_REPORT_INTERRUPT_ACTIVE_STATE_PARAMETERS, *PIO_REPORT_INTERRUPT_ACTIVE_STATE_PARAMETERS; + typedef enum _IO_ACCESS_TYPE { ReadAccess, WriteAccess, @@ -920,7 +931,12 @@ typedef struct _DEVICE_CAPABILITIES { ULONG NonDynamic:1; ULONG WarmEjectSupported:1; ULONG NoDisplayInUI:1; - ULONG Reserved:14; + ULONG Reserved1:1; + ULONG WakeFromInterrupt:1; + ULONG SecureDevice:1; + ULONG ChildOfVgaEnabledBridge:1; + ULONG DecodeIoOnBoot:1; + ULONG Reserved:9; ULONG Address; ULONG UINumber; DEVICE_POWER_STATE DeviceState[PowerSystemMaximum]; @@ -2027,6 +2043,7 @@ typedef enum _DMA_SPEED { #define DEVICE_DESCRIPTION_VERSION 0x0000 #define DEVICE_DESCRIPTION_VERSION1 0x0001 #define DEVICE_DESCRIPTION_VERSION2 0x0002 +#define DEVICE_DESCRIPTION_VERSION3 0x0003 typedef struct _DEVICE_DESCRIPTION { ULONG Version; @@ -2045,8 +2062,72 @@ typedef struct _DEVICE_DESCRIPTION { DMA_SPEED DmaSpeed; ULONG MaximumLength; ULONG DmaPort; +#if (NTDDI_VERSION >= NTDDI_WIN8) + ULONG DmaAddressWidth; + ULONG DmaControllerInstance; + ULONG DmaRequestLine; + PHYSICAL_ADDRESS DeviceAddress; +#endif // NTDDI_WIN8 } DEVICE_DESCRIPTION, *PDEVICE_DESCRIPTION; +#define DMA_ADAPTER_INFO_VERSION1 1 + +#define ADAPTER_INFO_SYNCHRONOUS_CALLBACK 0x0001 +#define ADAPTER_INFO_API_BYPASS 0x0002 + +typedef struct _DMA_ADAPTER_INFO_V1 +{ + ULONG ReadDmaCounterAvailable; + ULONG ScatterGatherLimit; + ULONG DmaAddressWidth; + ULONG Flags; + ULONG MinimumTransferUnit; +} DMA_ADAPTER_INFO_V1, *PDMA_ADAPTER_INFO_V1; + +typedef struct _DMA_ADAPTER_INFO +{ + ULONG Version; + union + { + DMA_ADAPTER_INFO_V1 V1; + }; +} DMA_ADAPTER_INFO, *PDMA_ADAPTER_INFO; + +#define DMA_TRANSFER_INFO_VERSION1 1 +#define DMA_TRANSFER_INFO_VERSION2 2 + +typedef struct _DMA_TRANSFER_INFO_V1 +{ + ULONG MapRegisterCount; + ULONG ScatterGatherElementCount; + ULONG ScatterGatherListSize; +} DMA_TRANSFER_INFO_V1, *PDMA_TRANSFER_INFO_V1; + +typedef struct _DMA_TRANSFER_INFO_V2 +{ + ULONG MapRegisterCount; + ULONG ScatterGatherElementCount; + ULONG ScatterGatherListSize; + ULONG LogicalPageCount; +} DMA_TRANSFER_INFO_V2, *PDMA_TRANSFER_INFO_V2; + +typedef struct _DMA_TRANSFER_INFO +{ + ULONG Version; + union { + DMA_TRANSFER_INFO_V1 V1; + DMA_TRANSFER_INFO_V2 V2; + }; +} DMA_TRANSFER_INFO, *PDMA_TRANSFER_INFO; + +#define DMA_TRANSFER_CONTEXT_VERSION1 1 + +#ifdef _WIN64 +#define DMA_TRANSFER_CONTEXT_SIZE_V1 128 +#else +#define DMA_TRANSFER_CONTEXT_SIZE_V1 64 +#endif + typedef enum _DEVICE_RELATION_TYPE { BusRelations, EjectionRelations, @@ -2194,6 +2275,14 @@ typedef struct _DMA_ADAPTER { struct _DMA_OPERATIONS* DmaOperations; } DMA_ADAPTER, *PDMA_ADAPTER; +typedef enum +{ + DmaComplete, + DmaAborted, + DmaError, + DmaCancelled +} DMA_COMPLETION_STATUS; + typedef VOID (NTAPI *PPUT_DMA_ADAPTER)( PDMA_ADAPTER DmaAdapter); @@ -2313,6 +2402,213 @@ typedef NTSTATUS _In_ PMDL OriginalMdl, _Out_ PMDL *TargetMdl); +typedef NTSTATUS +(NTAPI *PGET_DMA_ADAPTER_INFO)( + _In_ PDMA_ADAPTER DmaAdapter, + _Inout_ PDMA_ADAPTER_INFO AdapterInfo); + +typedef NTSTATUS +(NTAPI *PGET_DMA_TRANSFER_INFO)( + _In_ PDMA_ADAPTER DmaAdapter, + _In_ PMDL Mdl, + _In_ ULONGLONG Offset, + _In_ ULONG Length, + _In_ BOOLEAN WriteOnly, + _Inout_ PDMA_TRANSFER_INFO TransferInfo); + +typedef NTSTATUS +(NTAPI *PINITIALIZE_DMA_TRANSFER_CONTEXT)( + _In_ PDMA_ADAPTER DmaAdapter, + _Out_ PVOID DmaTransferContext); + +typedef PVOID +(NTAPI *PALLOCATE_COMMON_BUFFER_EX)( + _In_ PDMA_ADAPTER DmaAdapter, + _In_opt_ PPHYSICAL_ADDRESS MaximumAddress, + _In_ ULONG Length, + _Out_ PPHYSICAL_ADDRESS LogicalAddress, + _In_ BOOLEAN CacheEnabled, + _In_ NODE_REQUIREMENT PreferredNode); + +typedef NTSTATUS +(NTAPI *PALLOCATE_ADAPTER_CHANNEL_EX)( + _In_ PDMA_ADAPTER DmaAdapter, + _In_ PDEVICE_OBJECT DeviceObject, + _In_ PVOID DmaTransferContext, + _In_ ULONG NumberOfMapRegisters, + _In_ ULONG Flags, + _In_opt_ PDRIVER_CONTROL ExecutionRoutine, + _In_opt_ PVOID ExecutionContext, + _Out_opt_ PVOID *MapRegisterBase); + +typedef NTSTATUS +(NTAPI *PCONFIGURE_ADAPTER_CHANNEL)( + _In_ PDMA_ADAPTER DmaAdapter, + _In_ ULONG FunctionNumber, + _In_ PVOID Context); + +typedef BOOLEAN +(NTAPI *PCANCEL_ADAPTER_CHANNEL)( + _In_ PDMA_ADAPTER DmaAdapter, + _In_ PDEVICE_OBJECT DeviceObject, + _In_ PVOID DmaTransferContext); + +typedef +_Function_class_(DMA_COMPLETION_ROUTINE) +_IRQL_requires_max_(DISPATCH_LEVEL) +_IRQL_requires_min_(DISPATCH_LEVEL) +VOID +NTAPI +DMA_COMPLETION_ROUTINE( + _In_ PDMA_ADAPTER DmaAdapter, + _In_ PDEVICE_OBJECT DeviceObject, + _In_ PVOID CompletionContext, + _In_ DMA_COMPLETION_STATUS Status); + +typedef DMA_COMPLETION_ROUTINE *PDMA_COMPLETION_ROUTINE; + +typedef NTSTATUS +(NTAPI *PMAP_TRANSFER_EX)( + _In_ PDMA_ADAPTER DmaAdapter, + _In_ PMDL Mdl, + _In_ PVOID MapRegisterBase, + _In_ ULONGLONG Offset, + _In_ ULONG DeviceOffset, + _Inout_ PULONG Length, + _In_ BOOLEAN WriteToDevice, + _Out_writes_bytes_opt_(ScatterGatherBufferLength) PSCATTER_GATHER_LIST ScatterGatherBuffer, + _In_ ULONG ScatterGatherBufferLength, + _In_opt_ PDMA_COMPLETION_ROUTINE DmaCompletionRoutine, + _In_opt_ PVOID CompletionContext); + +typedef NTSTATUS +(NTAPI *PGET_SCATTER_GATHER_LIST_EX)( + _In_ PDMA_ADAPTER DmaAdapter, + _In_ PDEVICE_OBJECT DeviceObject, + _In_ PVOID DmaTransferContext, + _In_ PMDL Mdl, + _In_ ULONGLONG Offset, + _In_ ULONG Length, + _In_ ULONG Flags, + _In_opt_ PDRIVER_LIST_CONTROL ExecutionRoutine, + _In_opt_ PVOID Context, + _In_ BOOLEAN WriteToDevice, + _In_opt_ PDMA_COMPLETION_ROUTINE DmaCompletionRoutine, + _In_opt_ PVOID CompletionContext, + _Out_opt_ PSCATTER_GATHER_LIST *ScatterGatherList); + +typedef NTSTATUS +(NTAPI *PBUILD_SCATTER_GATHER_LIST_EX)( + _In_ PDMA_ADAPTER DmaAdapter, + _In_ PDEVICE_OBJECT DeviceObject, + _In_ PVOID DmaTransferContext, + _In_ PMDL Mdl, + _In_ ULONGLONG Offset, + _In_ ULONG Length, + _In_ ULONG Flags, + _In_opt_ PDRIVER_LIST_CONTROL ExecutionRoutine, + _In_opt_ PVOID Context, + _In_ BOOLEAN WriteToDevice, + _In_ PVOID ScatterGatherBuffer, + _In_ ULONG ScatterGatherLength, + _In_opt_ PDMA_COMPLETION_ROUTINE DmaCompletionRoutine, + _In_opt_ PVOID CompletionContext, + _Out_opt_ PVOID ScatterGatherList); + +typedef NTSTATUS +(NTAPI *PFLUSH_ADAPTER_BUFFERS_EX)( + _In_ PDMA_ADAPTER DmaAdapter, + _In_ PMDL Mdl, + _In_ PVOID MapRegisterBase, + _In_ ULONGLONG Offset, + _In_ ULONG Length, + _In_ BOOLEAN WriteToDevice); + +typedef VOID +(NTAPI *PFREE_ADAPTER_OBJECT)( + _In_ PDMA_ADAPTER DmaAdapter, + _In_ IO_ALLOCATION_ACTION AllocationAction); + +typedef NTSTATUS +(NTAPI *PCANCEL_MAPPED_TRANSFER)( + _In_ PDMA_ADAPTER DmaAdapter, + _In_ PVOID DmaTransferContext); + +typedef NTSTATUS +(NTAPI *PALLOCATE_DOMAIN_COMMON_BUFFER)( + _In_ PDMA_ADAPTER DmaAdapter, + _In_ HANDLE DomainHandle, + _In_opt_ PPHYSICAL_ADDRESS MaximumAddress, + _In_ ULONG Length, + _In_ ULONG Flags, + _In_opt_ MEMORY_CACHING_TYPE *CacheType, + _In_ NODE_REQUIREMENT PreferredNode, + _Out_ PPHYSICAL_ADDRESS LogicalAddress, + _Out_ PVOID *VirtualAddress); + +typedef NTSTATUS +(NTAPI *PFLUSH_DMA_BUFFER)( + _In_ PDMA_ADAPTER DmaAdapter, + _In_ PMDL Mdl, + _In_ BOOLEAN ReadOperation); + +typedef NTSTATUS +(NTAPI *PJOIN_DMA_DOMAIN)( + _In_ PDMA_ADAPTER DmaAdapter, + _In_ HANDLE DomainHandle); + +typedef NTSTATUS +(NTAPI *PLEAVE_DMA_DOMAIN)( + _In_ PDMA_ADAPTER DmaAdapter); + +typedef HANDLE +(NTAPI *PGET_DMA_DOMAIN)( + _In_ PDMA_ADAPTER DmaAdapter); + +typedef PVOID +(NTAPI *PALLOCATE_COMMON_BUFFER_WITH_BOUNDS)( + _In_ PDMA_ADAPTER DmaAdapter, + _In_opt_ PPHYSICAL_ADDRESS MinimumAddress, + _In_opt_ PPHYSICAL_ADDRESS MaximumAddress, + _In_ ULONG Length, + _In_ ULONG Flags, + _In_opt_ MEMORY_CACHING_TYPE *CacheType, + _In_ NODE_REQUIREMENT PreferredNode, + _Out_ PPHYSICAL_ADDRESS LogicalAddress); + +typedef struct _DMA_COMMON_BUFFER_VECTOR DMA_COMMON_BUFFER_VECTOR, *PDMA_COMMON_BUFFER_VECTOR; + +typedef NTSTATUS +(NTAPI *PALLOCATE_COMMON_BUFFER_VECTOR)( + _In_ PDMA_ADAPTER DmaAdapter, + _In_ PHYSICAL_ADDRESS LowAddress, + _In_ PHYSICAL_ADDRESS HighAddress, + _In_ MEMORY_CACHING_TYPE CacheType, + _In_ ULONG IdealNode, + _In_ ULONG Flags, + _In_ ULONG NumberOfElements, + _In_ ULONGLONG SizeOfElements, + _Out_ PDMA_COMMON_BUFFER_VECTOR *VectorOut); + +typedef VOID +(NTAPI *PGET_COMMON_BUFFER_FROM_VECTOR_BY_INDEX)( + _In_ PDMA_ADAPTER DmaAdapter, + _In_ PDMA_COMMON_BUFFER_VECTOR Vector, + _In_ ULONG Index, + _Out_ PVOID *VirtualAddressOut, + _Out_ PPHYSICAL_ADDRESS LogicalAddressOut); + +typedef VOID +(NTAPI *PFREE_COMMON_BUFFER_FROM_VECTOR)( + _In_ PDMA_ADAPTER DmaAdapter, + _In_ PDMA_COMMON_BUFFER_VECTOR Vector, + _In_ ULONG Index); + +typedef VOID +(NTAPI *PFREE_COMMON_BUFFER_VECTOR)( + _In_ PDMA_ADAPTER DmaAdapter, + _In_ PDMA_COMMON_BUFFER_VECTOR Vector); + typedef struct _DMA_OPERATIONS { ULONG Size; PPUT_DMA_ADAPTER PutDmaAdapter; @@ -2330,6 +2626,29 @@ typedef struct _DMA_OPERATIONS { PCALCULATE_SCATTER_GATHER_LIST_SIZE CalculateScatterGatherList; PBUILD_SCATTER_GATHER_LIST BuildScatterGatherList; PBUILD_MDL_FROM_SCATTER_GATHER_LIST BuildMdlFromScatterGatherList; + PGET_DMA_ADAPTER_INFO GetDmaAdapterInfo; + PGET_DMA_TRANSFER_INFO GetDmaTransferInfo; + PINITIALIZE_DMA_TRANSFER_CONTEXT InitializeDmaTransferContext; + PALLOCATE_COMMON_BUFFER_EX AllocateCommonBufferEx; + PALLOCATE_ADAPTER_CHANNEL_EX AllocateAdapterChannelEx; + PCONFIGURE_ADAPTER_CHANNEL ConfigureAdapterChannel; + PCANCEL_ADAPTER_CHANNEL CancelAdapterChannel; + PMAP_TRANSFER_EX MapTransferEx; + PGET_SCATTER_GATHER_LIST_EX GetScatterGatherListEx; + PBUILD_SCATTER_GATHER_LIST_EX BuildScatterGatherListEx; + PFLUSH_ADAPTER_BUFFERS_EX FlushAdapterBuffersEx; + PFREE_ADAPTER_OBJECT FreeAdapterObject; + PCANCEL_MAPPED_TRANSFER CancelMappedTransfer; + PALLOCATE_DOMAIN_COMMON_BUFFER AllocateDomainCommonBuffer; + PFLUSH_DMA_BUFFER FlushDmaBuffer; + PJOIN_DMA_DOMAIN JoinDmaDomain; + PLEAVE_DMA_DOMAIN LeaveDmaDomain; + PGET_DMA_DOMAIN GetDmaDomain; + PALLOCATE_COMMON_BUFFER_WITH_BOUNDS AllocateCommonBufferWithBounds; + PALLOCATE_COMMON_BUFFER_VECTOR AllocateCommonBufferVector; + PGET_COMMON_BUFFER_FROM_VECTOR_BY_INDEX GetCommonBufferFromVectorByIndex; + PFREE_COMMON_BUFFER_FROM_VECTOR FreeCommonBufferFromVector; + PFREE_COMMON_BUFFER_VECTOR FreeCommonBufferVector; } DMA_OPERATIONS, *PDMA_OPERATIONS; typedef struct _IO_RESOURCE_DESCRIPTOR { @@ -2355,6 +2674,14 @@ typedef struct _IO_RESOURCE_DESCRIPTOR { struct { ULONG MinimumVector; ULONG MaximumVector; +#if defined(NT_PROCESSOR_GROUPS) + IRQ_DEVICE_POLICY AffinityPolicy; + USHORT Group; +#else + IRQ_DEVICE_POLICY AffinityPolicy; +#endif + IRQ_PRIORITY PriorityPolicy; + KAFFINITY TargetedProcessors; } Interrupt; struct { ULONG MinimumChannel; @@ -2589,7 +2916,8 @@ typedef enum _BUS_QUERY_ID_TYPE { BusQueryHardwareIDs, BusQueryCompatibleIDs, BusQueryInstanceID, - BusQueryDeviceSerialNumber + BusQueryDeviceSerialNumber, + BusQueryContainerID } BUS_QUERY_ID_TYPE, *PBUS_QUERY_ID_TYPE; typedef enum _DEVICE_TEXT_TYPE { @@ -7110,3 +7438,149 @@ typedef struct _IO_PRIORITY_INFO { } IO_PRIORITY_INFO, *PIO_PRIORITY_INFO; #endif $endif (_NTIFS_) + +$if (_WDMDDK_) + +#define D3COLD_SUPPORT_INTERFACE_VERSION 1 + +typedef +_Function_class_(SET_D3COLD_SUPPORT) +_IRQL_requires_(PASSIVE_LEVEL) +VOID +SET_D3COLD_SUPPORT( + _In_reads_opt_(_Inexpressible_("varies")) PVOID Context, + _In_ BOOLEAN D3ColdSupport); + +typedef SET_D3COLD_SUPPORT *PSET_D3COLD_SUPPORT; + +typedef enum _DEVICE_WAKE_DEPTH +{ + DeviceWakeDepthNotWakeable = 0, + DeviceWakeDepthD0, + DeviceWakeDepthD1, + DeviceWakeDepthD2, + DeviceWakeDepthD3hot, + DeviceWakeDepthD3cold, + DeviceWakeDepthMaximum +} DEVICE_WAKE_DEPTH, *PDEVICE_WAKE_DEPTH; + +FORCEINLINE +DEVICE_POWER_STATE +MapWakeDepthToDstate( + _In_ DEVICE_WAKE_DEPTH WakeDepth) +{ + const DEVICE_POWER_STATE dstateMap[DeviceWakeDepthMaximum] = + { + PowerDeviceD0, + PowerDeviceD0, + PowerDeviceD1, + PowerDeviceD2, + PowerDeviceD3, + PowerDeviceD3 + }; + + if (WakeDepth < 0 || WakeDepth >= DeviceWakeDepthMaximum) + { + return PowerDeviceUnspecified; + } + else + { + return dstateMap[WakeDepth]; + } +} + +typedef +_Function_class_(GET_IDLE_WAKE_INFO) +_IRQL_requires_(PASSIVE_LEVEL) +NTSTATUS +GET_IDLE_WAKE_INFO( + _In_reads_opt_(_Inexpressible_("varies")) PVOID Context, + _In_ SYSTEM_POWER_STATE SystemPowerState, + _Out_ PDEVICE_WAKE_DEPTH DeepestWakeableDstate); + +typedef GET_IDLE_WAKE_INFO *PGET_IDLE_WAKE_INFO; + +typedef +_Function_class_(GET_D3COLD_CAPABILITY) +_IRQL_requires_(PASSIVE_LEVEL) +NTSTATUS +GET_D3COLD_CAPABILITY( + _In_reads_opt_(_Inexpressible_("varies")) PVOID Context, + _Out_ PBOOLEAN D3ColdSupported); + +typedef GET_D3COLD_CAPABILITY *PGET_D3COLD_CAPABILITY; + +typedef enum _D3COLD_LAST_TRANSITION_STATUS +{ + LastDStateTransitionStatusUnknown = 0, + LastDStateTransitionD3hot, + LastDStateTransitionD3cold +} D3COLD_LAST_TRANSITION_STATUS, *PD3COLD_LAST_TRANSITION_STATUS; + +typedef +_Function_class_(GET_D3COLD_LAST_TRANSITION_STATUS) +_IRQL_requires_max_(DISPATCH_LEVEL) +VOID +GET_D3COLD_LAST_TRANSITION_STATUS( + _In_reads_opt_(_Inexpressible_("varies")) PVOID Context, + _Out_ PD3COLD_LAST_TRANSITION_STATUS LastTransitionStatus); + +typedef GET_D3COLD_LAST_TRANSITION_STATUS *PGET_D3COLD_LAST_TRANSITION_STATUS; + +typedef struct _D3COLD_SUPPORT_INTERFACE +{ + USHORT Size; + USHORT Version; + PVOID Context; + PINTERFACE_REFERENCE InterfaceReference; + PINTERFACE_DEREFERENCE InterfaceDereference; + PSET_D3COLD_SUPPORT SetD3ColdSupport; + PGET_IDLE_WAKE_INFO GetIdleWakeInfo; + PGET_D3COLD_CAPABILITY GetD3ColdCapability; + PGET_D3COLD_CAPABILITY GetBusDriverD3ColdSupport; + PGET_D3COLD_LAST_TRANSITION_STATUS GetLastTransitionStatus; +} D3COLD_SUPPORT_INTERFACE, *PD3COLD_SUPPORT_INTERFACE; + +typedef +_Function_class_(D3COLD_REQUEST_CORE_POWER_RAIL) +_IRQL_requires_(PASSIVE_LEVEL) +VOID +D3COLD_REQUEST_CORE_POWER_RAIL( + _In_reads_opt_(_Inexpressible_("varies")) PVOID Context, + _In_ BOOLEAN CorePowerRailNeeded); + +typedef D3COLD_REQUEST_CORE_POWER_RAIL *PD3COLD_REQUEST_CORE_POWER_RAIL; + +typedef +_Function_class_(D3COLD_REQUEST_AUX_POWER) +_IRQL_requires_(PASSIVE_LEVEL) +NTSTATUS +D3COLD_REQUEST_AUX_POWER( + _In_reads_opt_(_Inexpressible_("varies")) PVOID Context, + _In_ ULONG AuxPowerInMilliWatts, + _Out_ PULONG RetryInSeconds); + +typedef D3COLD_REQUEST_AUX_POWER *PD3COLD_REQUEST_AUX_POWER; + +typedef +_Function_class_(D3COLD_REQUEST_PERST_DELAY) +_IRQL_requires_(PASSIVE_LEVEL) +NTSTATUS +D3COLD_REQUEST_PERST_DELAY( + _In_reads_opt_(_Inexpressible_("varies")) PVOID Context, + _In_ ULONG DelayInMicroSeconds); + +typedef D3COLD_REQUEST_PERST_DELAY *PD3COLD_REQUEST_PERST_DELAY; + +typedef struct _D3COLD_AUX_POWER_AND_TIMING_INTERFACE +{ + USHORT Size; + USHORT Version; + PVOID Context; + PINTERFACE_REFERENCE InterfaceReference; + PINTERFACE_DEREFERENCE InterfaceDereference; + PD3COLD_REQUEST_CORE_POWER_RAIL RequestCorePowerRail; + PD3COLD_REQUEST_AUX_POWER RequestAuxPower; + PD3COLD_REQUEST_PERST_DELAY RequestPerstDelay; +} D3COLD_AUX_POWER_AND_TIMING_INTERFACE, *PD3COLD_AUX_POWER_AND_TIMING_INTERFACE; +$endif(_WDMDDK_) diff --git a/sdk/include/xdk/ketypes.h b/sdk/include/xdk/ketypes.h index 5e276c08c71..d8abc4089c2 100644 --- a/sdk/include/xdk/ketypes.h +++ b/sdk/include/xdk/ketypes.h @@ -871,6 +871,12 @@ typedef enum _POOL_TYPE { PagedPoolCacheAligned, NonPagedPoolCacheAlignedMustS, MaxPoolType, + + NonPagedPoolBase = 0, + NonPagedPoolBaseMustSucceed = NonPagedPoolBase + 2, + NonPagedPoolBaseCacheAligned = NonPagedPoolBase + 4, + NonPagedPoolBaseCacheAlignedMustS = NonPagedPoolBase + 6, + NonPagedPoolSession = 32, PagedPoolSession, NonPagedPoolMustSucceedSession, diff --git a/sdk/include/xdk/mmfuncs.h b/sdk/include/xdk/mmfuncs.h index d8a18fb9a42..478763fbc6e 100644 --- a/sdk/include/xdk/mmfuncs.h +++ b/sdk/include/xdk/mmfuncs.h @@ -321,12 +321,11 @@ PVOID NTAPI MmMapLockedPagesSpecifyCache( _Inout_ PMDL MemoryDescriptorList, - _In_ __drv_strictType(KPROCESSOR_MODE/enum _MODE,__drv_typeConst) - KPROCESSOR_MODE AccessMode, + _In_ __drv_strictType(KPROCESSOR_MODE/enum _MODE,__drv_typeConst) KPROCESSOR_MODE AccessMode, _In_ __drv_strictTypeMatch(__drv_typeCond) MEMORY_CACHING_TYPE CacheType, - _In_opt_ PVOID BaseAddress, + _In_opt_ PVOID RequestedAddress, _In_ ULONG BugCheckOnFailure, - _In_ MM_PAGE_PRIORITY Priority); + _In_ ULONG Priority); _IRQL_requires_max_(APC_LEVEL) NTKERNELAPI diff --git a/sdk/include/xdk/potypes.h b/sdk/include/xdk/potypes.h index 43ee700c8bb..9524ee0b7c4 100644 --- a/sdk/include/xdk/potypes.h +++ b/sdk/include/xdk/potypes.h @@ -56,7 +56,7 @@ typedef enum _POWER_INFORMATION_LEVEL { SetPowerSettingValue, NotifyUserPowerSetting, PowerInformationLevelUnused0, - PowerInformationLevelUnused1, + SystemMonitorHiberBootPowerOff, SystemVideoState, TraceApplicationPowerMessage, TraceApplicationPowerMessageEnd, @@ -80,6 +80,50 @@ typedef enum _POWER_INFORMATION_LEVEL { ProcessorIdleDomains, WakeTimerList, SystemHiberFileSize, + ProcessorIdleStatesHv, + ProcessorPerfStatesHv, + ProcessorPerfCapHv, + ProcessorSetIdle, + LogicalProcessorIdling, + UserPresence, + PowerSettingNotificationName, + GetPowerSettingValue, + IdleResiliency, + SessionRITState, + SessionConnectNotification, + SessionPowerCleanup, + SessionLockState, + SystemHiberbootState, + PlatformInformation, + PdcInvocation, + MonitorInvocation, + FirmwareTableInformationRegistered, + SetShutdownSelectedTime, + SuspendResumeInvocation, + PlmPowerRequestCreate, + ScreenOff, + CsDeviceNotification, + PlatformRole, + LastResumePerformance, + DisplayBurst, + ExitLatencySamplingPercentage, + RegisterSpmPowerSettings, + PlatformIdleStates, + ProcessorIdleVeto, // deprecated + PlatformIdleVeto, // deprecated + SystemBatteryStatePrecise, + ThermalEvent, + PowerRequestActionInternal, + BatteryDeviceState, + PowerInformationInternal, + ThermalStandby, + SystemHiberFileType, + PhysicalPowerButtonPress, + QueryPotentialDripsConstraint, + EnergyTrackerCreate, + EnergyTrackerQuery, + UpdateBlackBoxRecorder, + SessionAllowExternalDmaDevices, PowerInformationLevelMaximum } POWER_INFORMATION_LEVEL; @@ -254,9 +298,29 @@ typedef enum _POWER_PLATFORM_ROLE { PlatformRoleSOHOServer, PlatformRoleAppliancePC, PlatformRolePerformanceServer, + PlatformRoleSlate, PlatformRoleMaximum } POWER_PLATFORM_ROLE; +#define POWER_PLATFORM_ROLE_V1 (0x00000001) +#define POWER_PLATFORM_ROLE_V1_MAX (PlatformRolePerformanceServer + 1) + +#define POWER_PLATFORM_ROLE_V2 (0x00000002) +#define POWER_PLATFORM_ROLE_V2_MAX (PlatformRoleSlate + 1) + +#if (NTDDI_VERSION >= NTDDI_WIN8) +#define POWER_PLATFORM_ROLE_VERSION POWER_PLATFORM_ROLE_V2 +#define POWER_PLATFORM_ROLE_VERSION_MAX POWER_PLATFORM_ROLE_V2_MAX +#else +#define POWER_PLATFORM_ROLE_VERSION POWER_PLATFORM_ROLE_V1 +#define POWER_PLATFORM_ROLE_VERSION_MAX POWER_PLATFORM_ROLE_V1_MAX +#endif + +typedef struct _POWER_PLATFORM_INFORMATION +{ + BOOLEAN AoAc; +} POWER_PLATFORM_INFORMATION, *PPOWER_PLATFORM_INFORMATION; + #if (NTDDI_VERSION >= NTDDI_WINXP) || !defined(_BATCLASS_) typedef struct { ULONG Granularity; @@ -413,6 +477,215 @@ typedef NTSTATUS _In_ ULONG ValueLength, _Inout_opt_ PVOID Context); typedef POWER_SETTING_CALLBACK *PPOWER_SETTING_CALLBACK; + +#if (NTDDI_VERSION >= NTDDI_WIN8) + +#define PO_FX_VERSION_V1 0x00000001 +#define PO_FX_VERSION_V2 0x00000002 +#define PO_FX_VERSION_V3 0x00000003 +#define PO_FX_VERSION PO_FX_VERSION_V1 + +DECLARE_HANDLE(POHANDLE); + +typedef +_Function_class_(PO_FX_COMPONENT_ACTIVE_CONDITION_CALLBACK) +_IRQL_requires_max_(DISPATCH_LEVEL) +VOID +PO_FX_COMPONENT_ACTIVE_CONDITION_CALLBACK( + _In_ PVOID Context, + _In_ ULONG Component); + +typedef PO_FX_COMPONENT_ACTIVE_CONDITION_CALLBACK *PPO_FX_COMPONENT_ACTIVE_CONDITION_CALLBACK; + +typedef +_Function_class_(PO_FX_COMPONENT_IDLE_CONDITION_CALLBACK) +_IRQL_requires_max_(DISPATCH_LEVEL) +VOID +PO_FX_COMPONENT_IDLE_CONDITION_CALLBACK( + _In_ PVOID Context, + _In_ ULONG Component); + +typedef PO_FX_COMPONENT_IDLE_CONDITION_CALLBACK *PPO_FX_COMPONENT_IDLE_CONDITION_CALLBACK; + +typedef +_Function_class_(PO_FX_COMPONENT_IDLE_STATE_CALLBACK) +_IRQL_requires_max_(DISPATCH_LEVEL) +VOID +PO_FX_COMPONENT_IDLE_STATE_CALLBACK( + _In_ PVOID Context, + _In_ ULONG Component, + _In_ ULONG State); + +typedef PO_FX_COMPONENT_IDLE_STATE_CALLBACK *PPO_FX_COMPONENT_IDLE_STATE_CALLBACK; + +typedef +_Function_class_(PO_FX_DEVICE_POWER_REQUIRED_CALLBACK) +_IRQL_requires_max_(DISPATCH_LEVEL) +VOID +PO_FX_DEVICE_POWER_REQUIRED_CALLBACK( + _In_ PVOID Context); + +typedef PO_FX_DEVICE_POWER_REQUIRED_CALLBACK *PPO_FX_DEVICE_POWER_REQUIRED_CALLBACK; + +typedef +_Function_class_(PO_FX_DEVICE_POWER_NOT_REQUIRED_CALLBACK) +_IRQL_requires_max_(DISPATCH_LEVEL) +VOID +PO_FX_DEVICE_POWER_NOT_REQUIRED_CALLBACK( + _In_ PVOID Context); + +typedef PO_FX_DEVICE_POWER_NOT_REQUIRED_CALLBACK *PPO_FX_DEVICE_POWER_NOT_REQUIRED_CALLBACK; + +typedef +_Function_class_(PO_FX_POWER_CONTROL_CALLBACK) +_IRQL_requires_max_(DISPATCH_LEVEL) +NTSTATUS +PO_FX_POWER_CONTROL_CALLBACK( + _In_ PVOID DeviceContext, + _In_ LPCGUID PowerControlCode, + _In_reads_bytes_opt_(InBufferSize) PVOID InBuffer, + _In_ SIZE_T InBufferSize, + _Out_writes_bytes_opt_(OutBufferSize) PVOID OutBuffer, + _In_ SIZE_T OutBufferSize, + _Out_opt_ PSIZE_T BytesReturned); + +typedef PO_FX_POWER_CONTROL_CALLBACK *PPO_FX_POWER_CONTROL_CALLBACK; + +typedef +_Function_class_(PO_FX_COMPONENT_CRITICAL_TRANSITION_CALLBACK) +_IRQL_requires_max_(HIGH_LEVEL) +VOID +PO_FX_COMPONENT_CRITICAL_TRANSITION_CALLBACK( + _In_ PVOID Context, + _In_ ULONG Component, + _In_ BOOLEAN Active); + +typedef PO_FX_COMPONENT_CRITICAL_TRANSITION_CALLBACK *PPO_FX_COMPONENT_CRITICAL_TRANSITION_CALLBACK; + +typedef struct _PO_FX_COMPONENT_IDLE_STATE +{ + ULONGLONG TransitionLatency; + ULONGLONG ResidencyRequirement; + ULONG NominalPower; +} PO_FX_COMPONENT_IDLE_STATE, *PPO_FX_COMPONENT_IDLE_STATE; + +typedef struct _PO_FX_COMPONENT_V1 +{ + GUID Id; + ULONG IdleStateCount; + ULONG DeepestWakeableIdleState; + _Field_size_full_(IdleStateCount) PPO_FX_COMPONENT_IDLE_STATE IdleStates; +} PO_FX_COMPONENT_V1, *PPO_FX_COMPONENT_V1; + +typedef struct _PO_FX_DEVICE_V1 +{ + ULONG Version; + ULONG ComponentCount; + PPO_FX_COMPONENT_ACTIVE_CONDITION_CALLBACK ComponentActiveConditionCallback; + PPO_FX_COMPONENT_IDLE_CONDITION_CALLBACK ComponentIdleConditionCallback; + PPO_FX_COMPONENT_IDLE_STATE_CALLBACK ComponentIdleStateCallback; + PPO_FX_DEVICE_POWER_REQUIRED_CALLBACK DevicePowerRequiredCallback; + PPO_FX_DEVICE_POWER_NOT_REQUIRED_CALLBACK DevicePowerNotRequiredCallback; + PPO_FX_POWER_CONTROL_CALLBACK PowerControlCallback; + PVOID DeviceContext; + _Field_size_full_(ComponentCount) PO_FX_COMPONENT_V1 Components[ANYSIZE_ARRAY]; +} PO_FX_DEVICE_V1, *PPO_FX_DEVICE_V1; + +#define PO_FX_COMPONENT_FLAG_F0_ON_DX 0x0000000000000001 +#define PO_FX_COMPONENT_FLAG_NO_DEBOUNCE 0x0000000000000002 + +typedef struct _PO_FX_COMPONENT_V2 +{ + GUID Id; + ULONGLONG Flags; + ULONG DeepestWakeableIdleState; + ULONG IdleStateCount; + _Field_size_full_(IdleStateCount) PPO_FX_COMPONENT_IDLE_STATE IdleStates; + ULONG ProviderCount; + _Field_size_full_(ProviderCount) PULONG Providers; +} PO_FX_COMPONENT_V2, *PPO_FX_COMPONENT_V2; + +typedef struct _PO_FX_DEVICE_V2 +{ + ULONG Version; + ULONGLONG Flags; + PPO_FX_COMPONENT_ACTIVE_CONDITION_CALLBACK ComponentActiveConditionCallback; + PPO_FX_COMPONENT_IDLE_CONDITION_CALLBACK ComponentIdleConditionCallback; + PPO_FX_COMPONENT_IDLE_STATE_CALLBACK ComponentIdleStateCallback; + PPO_FX_DEVICE_POWER_REQUIRED_CALLBACK DevicePowerRequiredCallback; + PPO_FX_DEVICE_POWER_NOT_REQUIRED_CALLBACK DevicePowerNotRequiredCallback; + PPO_FX_POWER_CONTROL_CALLBACK PowerControlCallback; + PVOID DeviceContext; + ULONG ComponentCount; + _Field_size_full_(ComponentCount) PO_FX_COMPONENT_V2 Components[ANYSIZE_ARRAY]; +} PO_FX_DEVICE_V2, *PPO_FX_DEVICE_V2; + +#define PO_FX_DEVICE_FLAG_RESERVED_1 (0x0000000000000001ull) +#define PO_FX_DEVICE_FLAG_DFX_DIRECT_CHILDREN_OPTIONAL (0x0000000000000002ull) +#define PO_FX_DEVICE_FLAG_DFX_POWER_CHILDREN_OPTIONAL (0x0000000000000004ull) +#define PO_FX_DEVICE_FLAG_DFX_CHILDREN_OPTIONAL \ + (PO_FX_DEVICE_FLAG_DFX_DIRECT_CHILDREN_OPTIONAL | \ + PO_FX_DEVICE_FLAG_DFX_POWER_CHILDREN_OPTIONAL) + +#define PO_FX_DIRECTED_FX_DEFAULT_IDLE_TIMEOUT (0ul) +#define PO_FX_DIRECTED_FX_IMMEDIATE_IDLE_TIMEOUT ((ULONG)-1) +#define PO_FX_DIRECTED_FX_MAX_IDLE_TIMEOUT (10ul * 60) + +typedef +_Function_class_(PO_FX_DIRECTED_POWER_UP_CALLBACK) +_IRQL_requires_max_(DISPATCH_LEVEL) +_IRQL_requires_same_ +VOID +PO_FX_DIRECTED_POWER_UP_CALLBACK( + _In_ PVOID Context, + _In_ ULONG Flags); + +typedef PO_FX_DIRECTED_POWER_UP_CALLBACK *PPO_FX_DIRECTED_POWER_UP_CALLBACK; + +typedef +_Function_class_(PO_FX_DIRECTED_POWER_DOWN_CALLBACK) +_IRQL_requires_max_(DISPATCH_LEVEL) +_IRQL_requires_same_ +VOID +PO_FX_DIRECTED_POWER_DOWN_CALLBACK( + _In_ PVOID Context, + _In_ ULONG Flags); + +typedef PO_FX_DIRECTED_POWER_DOWN_CALLBACK *PPO_FX_DIRECTED_POWER_DOWN_CALLBACK; + +typedef struct _PO_FX_DEVICE_V3 +{ + ULONG Version; + ULONGLONG Flags; + PPO_FX_COMPONENT_ACTIVE_CONDITION_CALLBACK ComponentActiveConditionCallback; + PPO_FX_COMPONENT_IDLE_CONDITION_CALLBACK ComponentIdleConditionCallback; + PPO_FX_COMPONENT_IDLE_STATE_CALLBACK ComponentIdleStateCallback; + PPO_FX_DEVICE_POWER_REQUIRED_CALLBACK DevicePowerRequiredCallback; + PPO_FX_DEVICE_POWER_NOT_REQUIRED_CALLBACK DevicePowerNotRequiredCallback; + PPO_FX_POWER_CONTROL_CALLBACK PowerControlCallback; + PPO_FX_DIRECTED_POWER_UP_CALLBACK DirectedPowerUpCallback; + PPO_FX_DIRECTED_POWER_DOWN_CALLBACK DirectedPowerDownCallback; + ULONG DirectedFxTimeoutInSeconds; + PVOID DeviceContext; + ULONG ComponentCount; + _Field_size_full_(ComponentCount) PO_FX_COMPONENT_V2 Components[ANYSIZE_ARRAY]; +} PO_FX_DEVICE_V3, *PPO_FX_DEVICE_V3; + +#if (PO_FX_VERSION == PO_FX_VERSION_V1) +typedef PO_FX_COMPONENT_V1 PO_FX_COMPONENT, *PPO_FX_COMPONENT; +typedef PO_FX_DEVICE_V1 PO_FX_DEVICE, *PPO_FX_DEVICE; +#elif (PO_FX_VERSION == PO_FX_VERSION_V2) +typedef PO_FX_COMPONENT_V2 PO_FX_COMPONENT, *PPO_FX_COMPONENT; +typedef PO_FX_DEVICE_V2 PO_FX_DEVICE, *PPO_FX_DEVICE; +#elif (PO_FX_VERSION == PO_FX_VERSION_V3) +typedef PO_FX_COMPONENT_V2 PO_FX_COMPONENT, *PPO_FX_COMPONENT; +typedef PO_FX_DEVICE_V3 PO_FX_DEVICE, *PPO_FX_DEVICE; +#else +#error PO_FX_VERSION undefined! +#endif + +#endif // NTDDI_WIN8 + $endif (_WDMDDK_) $if (_NTIFS_) @@ -423,4 +696,3 @@ $if (_NTIFS_) #define PO_CB_LID_SWITCH_STATE 4 #define PO_CB_PROCESSOR_POWER_POLICY 5 $endif (_NTIFS_) -
