Hi, It looks like the change in revision 809 to 'iomd.c' has stopped RPCEmu getting past POST (and hence booting) with RISC OS 5. The RISC OS 5 HAL checks the version register and if zero assumes it's on RPCEmu (knowing that none of the real IOMD-a-like chips had a version 0) and skips the POST tests.
Now the register reports the true version POST runs and fails. My bet would be it's the Vsync timing test, so in my local copy I just set the id back to zero to keep moving. It's worth noting I think that this test also fails on normal ROMs (OS 3.70 et al) as there's a flash of red screen on startup. Options I see 1. Improve the timing accuracy of the VIDC emulation so it passes POST. I'm not sure I understand how the video thread runs well enough to say how hard/possible that is on the various OS' you can run RPCEmu on. It 2. Just change the version registers back to 0. I assume the IOMD2 one would need to be right for Phoebe? 3. Add RISC OS 5 to the known OS images in 'romload.c' and patch it with NOPs As the ROM is a moving target the patch might need to search for instruction sequences rather than just poking known addresses. 4. Similar to (3) but only set version register to 0 if RISC OS 5 spotted This is simpler than scanning the ROM, since the magic "OSIm" marker can quickly identify what was loaded. Or some other option I've not thought of, Sprow. _______________________________________________ Rpcemu mailing list [email protected] http://www.riscos.info/cgi-bin/mailman/listinfo/rpcemu
