I wasn't aware of the MMU differences but I thought the cache could simply be disabled in later ARM CPUs to provide backwards compatibility with ARM2/3. Do you know of anywhere that details the changes? I'm only familiar with the ARM2/3-based systems so I'm curious. With regards to using Arculator, that would be fine except that it's no longer developed and seems to have some issues. If we make the comparison to WinUAE which implements emulation of all the different hardware combinations available on the Amiga, then I'd like to think that emulation of the entire range of ARM-based Acorn systems 'under one roof' would also be practical and beneficial. Of course the developers only have so much time on their hands, and things have to be prioritised, but I do think it would be worthwhile.
On 1 March 2018 at 18:17, Theo Markettos <[email protected]> wrote: > On Thu, Mar 01, 2018 at 05:16:16PM +0000, J Percival wrote: > > I asked the same thing a while back. I was under the impression that the > > hardware was similar. As I understand it, ARM2 code will run fine on a > > StrongARM for instance (although needing to turn off the cache if the > code > > is self-modifying). Back in the day, there was the 'GameOn' utility - > apart > > from the cache control (and better support for old-style screenmodes > > maybe?) I'm not sure what it did to achieve compatibility with many > games - > > possibly patching them - but I think the differences weren't too > > significant - usually in these cases it's software that assumes a very > > specific environment that fail. It's possible that Arthur/RO2/RO3 would > run > > on a Risc PC - don't know if anyone has tried it. It would be nice to > have > > accurate emulation of older systems though as things like tech-demos are > > particularly sensitive to the configuration of the underlying (emulated) > > hardware. > > There are several thing to de-conflate here: > > 1. The user-level instruction set. ARMv4 (StrongARM) is largely a superset > of ARMv2 (ARM2/3) so minimal changes are required here (see 'StrongARM > compatibility' notes of old) > 2. The system-level CPU model. Exception modes and the MMU changed quite a > lot between ARM3 and ARM6, and the caches changed between ARM3, ARM6/7 and > StrongARM. > 3. System I/O, for instance video, timers, keyboards, interrupt sources, > motherboard chips. Some effort was put into making IOMD and VIDC20 be a > superset of IOC and VIDC1, but there are enough changes to make them > incompatible. > > > #2 is the big one. Arthur/RO2/RO3.1 would not work on a Risc PC without a > lot > of code changes - the result of those changes is called RO3.5. > > So best stick to Arculator if that's what you need. > > Theo > > _______________________________________________ > Rpcemu mailing list > [email protected] > http://www.riscos.info/cgi-bin/mailman/listinfo/rpcemu >
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