----- Original Message -----
From: "Tony Macabuhay" <[EMAIL PROTECTED]>
To: <[EMAIL PROTECTED]>
Sent: 31. julij 2001 22:54
Subject: Re: [rtl] Semi-beginner's (app design) questions


> Goran Bervar wrote:
>
> > 1) IMO it is always a bad idea to lock the serious RTOS (excluding DOS
of
> > course <g>) for such a long time. Can somebody explain what would happen
> > under RTL if done so?
>
> When you disable interrupts, you obviously disconnect yourself from the
outside
> world and lose your "hard" real-time capabilities.

Thanks for explanation. I've been thinking that RTOS might get broken
somehow in that case too but according to what David wrote this is not the
case. Therefore it is "somehow acceptable" to use this model, right? I agree
it is very brute and may even be an abuse of RTOS but if there's one "very
hard" real-time task - the one that handles interrupt - I think it is very
efficient. No time spent in scheduling, task switching and locking. It is a
model I referee to as a "virtual high priority processor".<g> Of course it
is a special case in real-time programming but still a real-time right? And
the rest time is still handled "as properly as possible" by RTOS right?

> In the case that the task runs
<snip>

Thx for very enlightening explanation again.

> Scheduling <snip>
> Proper scheduling and assignment of priorities is the only way to be truly
> "accurate".

I am confused. I always thought that IRQ handler _is_ the highest priority
task (assuming interrupts are enabled). In fact now I wonder if I can even
call it a task - it isn't touched by scheduler / (RT)OS at all, or is it?
Correct me if I am wrong but after interrupt routine is entered there will
be no switch until interrupts are re-enabled - regardless what happens.
Therefore I would assume that given a high priority hardware interrupt with
constant period interrupt handler will be more "accurate" than scheduled
task. IMO scheduled task may be delayed a little by both interrupt and
scheduler while interrupt handler can be delayed only by disable CPU for
interrupts right? Or am I missing something?

Many thanks, Tony!

Goran Bervar

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