Hi David Olofson,
Thank you for your nice reply.
Now, I have the board-design as belows,
Digital Data Stream(1 to 5Mbytes/s) ==> 64Kbytes FIFO (IDT7208 chip) ==> PPI
Card on ISA[but possible we substitute with PCI such PCI-1751 or PCIO-24 or
use EPP LPT Port) ==> PC PIII-833MHz==> Save to File
I want to capture the Data Stream to files, and we prefer to do that on
Linux OS. The problem is,
1. Capture Methode from modules
2. If we get data directly from user spaces(using ioperm), many data
some time lost.
Adolfo
-----Original Message-----
From: David Olofson [SMTP:[EMAIL PROTECTED]]
Sent: Monday, November 19, 2001 3:58 AM
To: [EMAIL PROTECTED]
Subject: Re: [rtl] DMA programming
On Sunday 18 November 2001 01:52, Adolf Ahmad MS wrote:
> Dear All,
>
> I have one problem to acquire data stream with speed 1 Mbytes/s,
so if
> we use "Rtirq" (interrupt method) we will loss much data.
Note that you if you're in control of what hardware you use, you
don't
*have* to handle one IRQ per sample. If there are FIFO buffers and
prescalers, or the IRQs can be triggered by the half-full/half-empty
signals from the FIFOs, you can pump a block of samples for each
IRQ.
You still get the port access overhead (unless you have memory
mapped
FIFO "ports"), but it might work...
> If you have experience to acquire the high speed data using DMA
single
> or double buffering in Linux, would you like to send me the
examples
I haven't programmed serious DMA stuff since the days of the Amiga,
and
the last time I did it was under DOS for some SoundBlaster card,
IIRC.
So, sorry; no RTL examples.
> (both "how to acquire the data stream from outside ?" and also
Not quite following... Are you thinking about configuring the DAQ
card,
and/or setting up the DMA controller for the transfer?
Very hardware dependant stuff (except for the part of the DMA done
by the
PC chipset) - you probably need to be more specific to get useful
info.
> " how to get the data from DMA memory " without loss any data).
If you don't have double DMA buffers, cicular DMA buffers or DMA
buffers
+ hardware FIFOs, there's no way to avoid missing a few samples. You
*must* use hardware that one way or another cuts your ISR some
slack. If
the ISR starts up exactly when the DMA pointer wraps, and the ISR
starts
reading from the start of the DMA buffer, the first few bytes will
already be overwritten by the time the ISR starts.
What you usually can do, even without explicit hardware support, is
to
simulate a circular DMA buffer using an RTL oneshot timer thread
triggered by the "DMA completion ISR". Have the ISR start reading in
the
middle, grabbing the last half of the DMA buffer. Then wait for the
timer
thread to wake up after approximately 50% of one period, to grab the
first half of the buffer. That way, you'll always be reading at
least
half a buffer away from the DMA pointer, which gives you plenty of
margin
to handle the scheduling jitter.
Of course, to make an "instant start" without dropping the first
half DMA
buffer entirely, you need to set up the delayed thread when you
start the
DMA, so that it can grab the first half of the buffer before the DMA
wraps and starts overwriting the data.
//David Olofson --- Programmer, Reologica Instruments AB
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