Hi,

After maturing some experience by using my variant of RTL under UP and
dual SMP I got the impression that UP applications have significant less
jitter than those under SMP. Thus it is better to use an UP if you want
to run applications with tight scheduling over 10 Khz. To me that
roughly means that for such cases it can be better to use two fast
communicating PCs instead of a single dual SMP, and SMP should be used
for hard real time below 10 Khz. 

Another impression I got is that when you cause a lot of traffic on the
APIC bus it appears not to be such a marvelous thing, delay of up to 10
us in receiving a message are not uncommon, and you cannot get much more
by changing vector/priorities. I think the bus runs nominally at 16 Mhz
and messages take from 14 to 31 cycles at least. So despite INTEL claims
latency with an IO_APIC or with an 8259 is not much improved, maybe
worsened instead. Take into account that with high load and widely
spread timings it is impossible to keep all RT tasks stuck to a
specified cpu, and scheduling messaging cannot be avoided, so that you
are likely to be often constrained to trade jitter against even longest
postponements.

I'd like to hear comments and experiences on these subjects.

Ciao, Paolo.
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