On Wed, Jul 05, 2000 at 05:32:35PM -0500, daniel sheltraw wrote:
> Hello RTers
>
>
> A couple basic questions for yall,
>
> I have a PII machine. When I look in /proc/ioports I see "timer" listed once
> with associated port addresses 40h-5fh.
>
> Q: Is all this address space for one PIT only?
No. It is a 8253-compatible chip, which has 3 timers. Ports
0x44-0x5f are aliased to 0x40-0x43.
Timer 0 is used for the 100 Hz clock interrupt (Linux) , and
one-shot or periodic clocking in RTAI and RTLinux. In some
cases, the Local APIC timer on the Pentium may be used.
Timer 1 was historically used to refresh DRAM. This is no
longer the case, typically. Several of my machines work fine
when you reprogram timer 1, but my laptop crashes any time
the APM BIOS is entered if timer 1 has been modified.
The output of timer 2 is connected to the PC internal speaker,
and is responsible for the freqency of the console beeping.
If you are willing to give up the console beep (who isn't?
I find it annoying...) then you can use timer 2 for other
purposes.
Only timer 0 is connected to an interrupt. (IRQ 0)
> Q: Which counter (and PIT if more than one is available) is being
> used for RTLinux (or RTAI)?
Both use Timer 0 for timing purposes, if a Local APIC is
not available or not enabled. RTAI uses timer 2 to emulate
a TSC.
> Q: By "time-stamp clock" does one mean system clock?
No. Time stamp _counter_ refers to the Pentium-internal counter,
which increments at the processor core frequency. It can be
accessed much faster than the 8253 timers, is more accurate,
and overflows less often.
> Q: How does any of the above differ for the 486?
Most 486's don't have a TSC. (Some clones do.)
dave...
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