Edwin Blink wrote: > I made some more test for the 4 Ts penalty It looks like it > occures once every 8 Ts (8 pixels?)
For I/O accesses, add 4 tstates for the read/write, rounding up to the next multiple of 8 for ASIC ports (&F8 to &FF). For memory accesses, add 3 tstates for the read/write, rounding to the next 4 for uncontended RAM accesses, or to the next 8 for contended RAM accesses. The mode 1 contention stripes apply in the same way as contended RAM accesses, giving the same 8 tstate rounding in affected areas (which includes the border). ROM and external RAM accesses are not rounded at all. > So if you write youre code carefully you could fill the > penalty time with more useful instructions Especially since accessing ASIC ports from ROM or external RAM can give a 7 tstate penalty if you're unlucky! > But there are still some oddities. In one case I tested when the NOP was > outside my timing code a IN was 16 Ts and when the NOP was inside it the > IN was 12 Ts. I'm not aware of any outstanding issues in the latest SimCoupé betas, despite Dave and I throwing everything we can at them. If you find an unexplained oddity, and it does something different in SimCoupé, you've found something new :-) Si
