Hello,
Please share your consultant resume to tah...@usmsystems.com

Job Title: Pre-Silicon Validation Engineer (Mixed Signal)
Hillsboro, OR
Long term contract

*Responsibilities*
Functional validation of products with both analog and digital components
in them using  digital and mixed signal simulation tools
Defining and developing necessary validation infrastructure tests, checkers
and occasional scripting in perl or unix shell to execute the validation
plans to ensure functional correctness of the design
Read and interpret technical specs and create high quality technical
documentation
Understanding DUT specifications, digital logic and analog circuit
implementation, defining validation strategy, creating test plans
Document validation plan and create appropriate software/content to execute
to the plan

*Minimum Qualifications*
Must have either a BS or MS in Electrical Engineering, Computer Engineering
or Electrical and Computer Engineering
2yrs experience with basic analog, mixed signal circuits
2yrs experience with digital logic design and simulation using Verilog/VHDL

1yr experience in developing verification collateral using SVTB based
OVM/UVM or Verilog/VHDL
1yr experience with high speed I/Os like DDR, PCI-express, USB or similar
IO interfaces
6mths experience with computer architecture
6mths experience with scripting languages like Perl and/or Shell
6mths experience with circuit simulation tools like Pspice and application
of circuit analysis concepts
2yrs experience with UNIX* or Linux*

*Preferred Qualifications*
6mths+ experience with Verilog-A/VHDL-A/AMS and mixed signal simulation
tools like Cadence* AMS, Mentor* ADMS and/or their equivalent
6mths+ industry experience in SOC/ASIC verification
6mths+ experience in post-si debug and validation
Working knowledge of C/C++/System C and other high level languages

Best Regards,

Mohammed Taher
US IT Recruiter
Direct: 703 349 4237
USM Business Systems
Chantilly, VA 20151, USA.

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