*Hello, Please check the job description and send me your updated resume to cdu...@spectraforce.com ASAP*
* * *Pre-Silicon functional verification Senior Engineer* *Location: Allentown PA, Austin TX, Folsom CA* *Job Description – Functional Verification engineer (Pre-Silicon)* 1. Qualification: MS-EE 2. Experience Level: 4+ Years 3. Skill set and experience a. At least 3+ years’ experience in pre-silicon verification b. Expertise in Building scalable HVL based verification environment from Scratch using System Verilog OVM/UVM c. Good experience in System Verilog – OVM/UVM based verification environment development d. Sound understanding of Random and constrained random-verification concepts e. Experience with assertion based verification would be a plus f. Understanding PCI-E, USB, SATA, DDR3 type protocols would be a plus 4. Role included: a. Driving the verification environment architecture b. Creating test scenarios(System Verilog OVM) c. Work with RTL teams to debug verification failures d. Review and ensure that expected Code and functional coverage metrics are achieved *With Regards,* *Chandan Dutta* *Client Delivery Lead* [image: Description: Description: Description: cid:image001.png@01CC998F.66C45E20] <http://www.spectraforce.com/index.aspx> *Ph. No. 919 887 6786 Ext. 4008* *Fax No. 919-233-4467* *Spectraforce Technologies Inc.|Raleigh. Hyderabad. Pune. Chandigarh. Bangalore* -- You received this message because you are subscribed to the Google Groups "American Vendor--IT Consulting" group. To post to this group, send email to sap-vendor@googlegroups.com. To unsubscribe from this group, send email to sap-vendor+unsubscr...@googlegroups.com. For more options, visit this group at http://groups.google.com/group/sap-vendor?hl=en.
