On Donnerstag, 15. März 2007, Matt Bauman wrote:
> Thank you, Mark. I've been pouring over all the datasheets, and
> couldn't quite seem to grasp these details.
>
> On Mar 14, 2007, at 10:56 PM, Mark Rages wrote:
> > ...
> > So the code ends up looking like this:
> >
> > void isr_high interrupt 1 {
> >
> > if (PIR2bits.TMR3IF) {
> > // deal with TMR3 expiring
> > PIR2bits.TMR3IF=0;
> > }
> >
> > if (INTCONbits.TMR0IF) {
> > // deal with TMR0 expiring
> > INTCONbits.TMR0IF=0;
> > }
> > }
>
> Aha! That makes complete sense. Thanks. That's exactly the piece
> of knowledge that I was missing. It clears up some other questions
> that I had about execution order, too. And the DEF_INT* and
> SIGHANDLER macros make a lot more sense now.
>
Just for reference, when using the SIGHANDLER macros, your ISR code will look
something like:
DEF_INTHIGH(high_isr)
DEF_HANDLER(SIG_TMR3, timer3_handler)
DEF_HANDLER(...)
END_DEF
SIGHANDLER(timer3_handler) {
PIR2bits.TMR3IF=0;
TMR3H=TMR3RELOAD_H;
TMR3L=TMR3RELOAD_L;
...
}
DEF_INTLOW(low_isr)
DEF_HANDLER(SIG_TMR0, timer0_handler)
END_DEF
SIGHANDLER(timer0_handler) {
INTCONbits.TMR0IF=0;
...
}
But be carefull when using both High and Low Priority Interrupts, It seems to
me that whenever a low isr is interrupted by a high priority isr, something
goes wrong...
Unfortunatly I haven't found time yet to verify if that problem still exists
with a current snapshot, and exactly what registers are messed up.
/Ernst
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