Dear list, the silabs C8051F060 incorporated a DMA controller. While the DMA controller is running, a special procedure must be followed to access the xram (wait DMA0XBY ==0, set DMA0HLT, access xram, clr DMA0HLT bit). I wonder how much work it would be to teach this feature to SDCC?
best regards Dani ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/ _______________________________________________ Sdcc-user mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/sdcc-user
