Dear Guys,
My problem is not really sdcc specific, but maybe someone reading it on
this list can point me into the right direction. I am trying to polish
and modify the code snippets below to work, but without any success. I
made several search with goggle, but could not find a good resolution
for my problem.
Using the IOC feature of the 16f690, I would like to detect and modify
impulse lengths. Unfortunately, only two input works out of 4.
The four input is located on PORTA (2) and PORTB (2).
I found that only one from PORTA and one from PORTB is working
simultaneously.
I could not find any reason, why does it not work alltogether.
If I try it in mplab it works greatly. :(
But, if it is downloaded into a chip I can see only one channel working
on both port.
Theblond
PS.: I have attached only the initialisation, and the interroupt, what
detects the start and the stop of the impulse and the end of the
modified impulse.
//------------------------------------------------------------------
void init_ports()
{
PORTA = 0;
PORTB = 0;
PORTC = 0;
__asm
banksel PORTA
movf PORTA,W
movf PORTB,W
__endasm;
ANSEL = ADC_CHANNEL_ANSEL;
ANSELH = 0;
TRISA = 0xff; // all input
TRISB = OUT_TxD;
TRISC = 0xc6;
IOCA = 0x03;
IOCB = 0x50;
__asm
banksel PORTA
movf PORTA,W
movf PORTB,W
__endasm;
//setup A/D for porta2, and wait some Tad cycle
ADCON1 = 0x20; // Fosc/32 when 8MHz -> 4usec
ADCON0 = 0x09; // left aligned result, adc on,
adc terminate
// setup adc delay with free running tmr2 bit 6
T2CON = 7; // tmr2 with fosc/4/16
TMR2 = 0; // wrap around in 2msec
}
//------------------------------------------------------------------
#define IN_CHN_0_LAST porta_last.bits.bit0
#define IN_CHN_1_LAST porta_last.bits.bit1
#define IN_CHN_2_LAST portb_last.bits.bit4
#define IN_CHN_3_LAST portb_last.bits.bit6
#define IN_CHN_0_BIT RA0
#define IN_CHN_1_BIT RA1
#define IN_CHN_2_BIT RB4
#define IN_CHN_3_BIT RB6
#define OUT_CHN_0_BIT RC0
#define OUT_CHN_1_BIT RC3
#define OUT_CHN_2_BIT RC4
#define OUT_CHN_3_BIT RC5
//------------------------------------------------------------------
void handle_interrupt(void) interrupt 1
{
if (RABIF) //IOC
{
__asm
banksel PORTA
movf PORTA,W
banksel _porta_tmp
movwf _porta_tmp
xorwf _porta_last,F
banksel PORTB
movf PORTB,W
banksel _portb_tmp
movwf _portb_tmp
xorwf _portb_last,F
__endasm;
Mode.bits.end_of_impulse = 0; // no impulse yet just store
time
impulse_channel.value = 0;
if (IN_CHN_0_LAST)
{
if (!IN_CHN_0_BIT) // 1->0
{
OUT_CHN_0_BIT = 1;
impulse_channel.bits.bit0 = 1;
debug_helper.bits.bit1 = 1;
} else
{
Mode.bits.end_of_impulse = 1; // found one
}
}
if (IN_CHN_1_LAST)
{
if (!IN_CHN_1_BIT) // 1->0
{
OUT_CHN_1_BIT = 1;
impulse_channel.bits.bit1 = 1;
} else
{
Mode.bits.end_of_impulse = 1; // found one
}
}
if (IN_CHN_2_LAST)
{
if (!IN_CHN_2_BIT) // 1->0
{
OUT_CHN_2_BIT = 1;
impulse_channel.bits.bit2 = 1;
} else
{
Mode.bits.end_of_impulse = 1; // found one
}
}
if (IN_CHN_3_LAST)
{
if (!IN_CHN_3_BIT) // 1->0
{
OUT_CHN_3_BIT = 1;
impulse_channel.bits.bit3 = 1;
} else
{
Mode.bits.end_of_impulse = 1; // found one
}
}
if (impulse_channel.value) // only if there were an impulse
timer1_start.word = timer1_tmp.word;
if (Mode.bits.end_of_impulse) //from v01.04 0->1 sure=1
{
Mode.bits.impulse_calc = 1; // need to calculate the impulse
duration
// no correction needed - speadup for zero percent - clear all
channels if end of impulse
if ((base_correction_percent == CORRECTION_PERCENT_ZERO) &&
(temp_correction_percent == CORRECTION_PERCENT_ZERO))
{
OUT_CHN_0_BIT = 0;
OUT_CHN_1_BIT = 0;
OUT_CHN_2_BIT = 0;
OUT_CHN_3_BIT = 0;
Mode.bits.impulse_calc = 0; // no need to calculate the
impulse duration
impulse_channel.value = 0; // clear all channels
}
timer1_stop.word = timer1_tmp.word;
timer1_delta.word = timer1_stop.word - timer1_start.word;
}
RABIF = 0; // clear to happen again
porta_last.value = porta_tmp;
portb_last.value = portb_tmp;
// TMR1
}else if (TMR1IF) // impulse out is finished
{
OUT_CHN_0_BIT = 0;
OUT_CHN_1_BIT = 0;
OUT_CHN_2_BIT = 0;
OUT_CHN_3_BIT = 0;
impulse_channel.value = 0; // clear all channels
Mode.bits.tmr1_int = 0; // no int pending
TMR1IE = 0; // disable
TMR1IF = 0; // clear to happen again
}
}
//------------------------------------------------------------------
------------------------------------------------------------------------------
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