> Hi
>
> Your code looks fine. I usually use void low_isr(void) interrupt 0. Why
> did you use 0x08?
0x00 gplink fails with errorcode:
returned errorcode 256
multiple sections using address 0
In Compatibility mode all interrupts branch to 0x08.
> Are you sure that the cpu is running? or how do you know that its not
> getting into the isr?
Tested with PIKLAB & ICD2 debugger.
>
> Regards,
>
>
> milan schrieb:
>> Hi.
>> Sorry, but I don't know how to force this little bit of code to jump
>> into isr.
>> Can You help?
>>
>> #include <pic18f1220.h>
>> #include <delay.h>
>>
>> /*
>> ----------------------------------------------------------------------- */
>> code char at __CONFIG1H CONFIG1H = _OSC_INT_Port_on_RA6_Port_on_RA7_1H &
>> _FCMEN_OFF_1H & _IESO_OFF_1H;
>> code char at __CONFIG2L CONFIG2L = _PUT_OFF_2L & _BODEN_OFF_2L &
>> _BODENV_2_0V_2L;
>> code char at __CONFIG2H CONFIG2H = _WDT_DISABLED_CONTROLLED_2H &
>> _WDTPS_1_32768_2H;
>> code char at __CONFIG3H CONFIG3H = _MCLRE_MCLR_enabled_RA5_input_dis_3H;
>> code char at __CONFIG4L CONFIG4L = _STVR_OFF_4L & _LVP_OFF_4L &
>> _BACKBUG_OFF_4L;
>> code char at __CONFIG5L CONFIG5L = _CP_0_OFF_5L & _CP_1_OFF_5L;
>> code char at __CONFIG5H CONFIG5H = _CPB_OFF_5H & _CPD_OFF_5H;
>> code char at __CONFIG6L CONFIG6L = _WRT_0_OFF_6L & _WRT_1_OFF_6L;
>> code char at __CONFIG6H CONFIG6H = _WRTC_OFF_6H & _WRTB_OFF_6H &
>> _WRTD_OFF_6H;
>> code char at __CONFIG7L CONFIG7L = _EBTR_0_OFF_7L & _EBTR_1_OFF_7L;
>> code char at __CONFIG7H CONFIG7H = _EBTRB_OFF_7H;
>>
>> unsigned long tmp0;
>>
>> static void isr(void) interrupt 0x8 { /* no priority */
>> T0CONbits.TMR0ON = 0;
>> PORTBbits.RB5 = 0;
>> INTCONbits.T0IF = 0;
>> TMR0L = 0;
>> delay100ktcy(5);
>> INTCONbits.T0IE = 1;
>> T0CONbits.TMR0ON = 1;
>> }
>>
>> void main() {
>> TRISB = 0x0B; //00001011
>> LATB = 0;
>> ADCON1 = 0xFF; //all pins as a digital ports
>> OSCCON = 0x6F;
>> RCONbits.IPEN = 0; //priority levels disabled
>> T0CONbits.T08BIT = 1; //TMR0 8 bit
>> T0CONbits.PSA = 1; //TMR0 no prescaler
>> T0CONbits.T0CS = 0; //TMR0 internal instruction clock cycle
>> //INTCONbits.T0IF = 0; //clear TMR0 int flag
>> //INTCONbits.GIE = 1; //global int enabled
>> //INTCONbits.PEIE = 1; //peripheral int enabled
>> //INTCONbits.T0IE = 1; //TMR0 int enabled
>> INTCON = 0xE0; //the same as above
>> T0CONbits.TMR0ON = 1; // TMR0
>>
>>
>> while (1){
>> PORTBbits.RB5 = 1;
>> delay100ktcy(5);
>> }
>> }
>>
>> ------------------------------------------------------------------------------
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>
> ------------------------------------------------------------------------------
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> the minds behind Google Creative Lab, Visual Complexity, Processing, &
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Register Now for Creativity and Technology (CaT), June 3rd, NYC. CaT
is a gathering of tech-side developers & brand creativity professionals. Meet
the minds behind Google Creative Lab, Visual Complexity, Processing, &
iPhoneDevCamp asthey present alongside digital heavyweights like Barbarian
Group, R/GA, & Big Spaceship. http://www.creativitycat.com
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