On Wed, Mar 7, 2012 at 7:04 PM, Guillem Jover <guil...@hadrons.org> wrote: > On Wed, 2012-03-07 at 17:54:57 +0000, Julian Pidancet wrote: >> So according to the manual, it should be BP, not EBP. > > The register being decreased should match the one being used to address > the stack, and the one to use depends on the descriptor as per above. >
There is no "descriptor" in real mode. Default stack size is always 16-bit. Also, I think the right thing to do is to decrement BP instead of EBP when SYSMODE_PREFIX_DATA is set: M.x86.R_BP -= 4; push_long(fetch_data_long_abs(M.x86.R_SS, M.x86.R_BP)); instead of: M.x86.R_EBP -= 4; push_long(fetch_data_long_abs(M.x86.R_SS, M.x86.R_BP)); ...to remain exactly consistent with the manual. >> In any case, It won't be a problem, because the 16 high bits of EBP >> will most likely be zero in real-mode code. > > Well, not if the the code is using some 32-bit instructions. :) > They are not "32-bit instructions". The processor is still functioning in real-mode, therefore, addressing still follows the rules of real-mode addressing, as mentioned in Volume 1:Basic Architecture : 3.3.5 32-Bit and 16-Bit Address and Operand Sizes [...] When operating in real-address mode, the default addressing and operand size is 16 bits. An address-size override can be used in real-address mode to enable 32-bit addressing. However, the maximum allowable 32-bit linear address is still 000FFFFFH (2^20-1). _______________________________________________ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios