On Thu, 2013-02-14 at 12:54 -0800, H. Peter Anvin wrote: > This would be a bug, but it isn't quite true. > > If you look at x86_cpu_reset() you will note that it sets the code > segment base to 0xffff0000, not 0xf0000 as one could expect from the > above. This is also true of a physical x86. > > As such, the *real* reset vector is at 0xfffffff0 as opposed to the > SeaBIOS vector at 0xffff0 -- this is a backwards compatibility vector > which typically just issues a real reset.
In SeaBIOS it doesn't. It jumps to entry_post(). Which is fine for native SeaBIOS, but I suppose I need to fix it to do a *real* reset in the CSM case, for those operating systems which will switch back to 16-bit mode and jump to f000:fff0 to reboot. Of course, if said "real reset" is only going to get straight back to the same 0xffff0 reset vector, that's not going to help. But at least then none of it will be *my* fault :) -- dwmw2
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