On Fri, Jan 11, 2013 at 2:57 AM, Vasilis Liaskovitis
<vasilis.liaskovi...@profitbricks.com> wrote:
>> >
>> > IIRC q35 supports memory hotplug natively (picked up in some
>> > discussion).  Is that correct?
>> >
>> From previous discussion I also understand that q35 supports native hotplug.
>> Sections 5.1 and 5.2 of the spec describe the MCH registers but the native
>> memory hotplug specifics are not yet clear to me. Any pointers from the
>> spec are welcome.
>
> Ping. Could anyone who's familiar with the q35 spec provide some pointers on
> native memory hotplug details in the spec? I see pcie hotplug registers but 
> can't
> find memory hotplug interface details. If I am not mistaken, the spec is here:
> http://www.intel.com/design/chipsets/datashts/316966.htm
>
> Is the q35 memory hotplug support supposed to be an shpc-like interface geared
> towards memory slots instead of pci slots?
>
I think there is no dedicated pci express downstream port for memory
slots, so native plug is not available.


> thanks,
>
> - Vasilis
>

_______________________________________________
SeaBIOS mailing list
SeaBIOS@seabios.org
http://www.seabios.org/mailman/listinfo/seabios

Reply via email to