On Tue, May 20, 2014 at 02:22:16PM +0100, David Woodhouse wrote: > Unless CONFIG_MALLOC_UPPERMEMORY is turned off, we expect to use the > space between the top of option ROMs and the bottom of our own BIOS code > as a stack. OVMF was previously marking the whole region from 0xC0000 to > 0xFFFFF read-only before invoking our Legacy16Boot method. Read-only > stack considered harmful. > > Version 0.98 of the CSM spec adds the UmaAddress and UmaSize fields, which > allow the CSM to specify a memory region that needs to be writable, so > provide that information. [...] > --- a/src/fw/csm.c > +++ b/src/fw/csm.c > @@ -34,6 +34,10 @@ EFI_COMPATIBILITY16_TABLE csm_compat_table VARFSEG > __aligned(16) = { > .Compatibility16CallOffset = 0 /* Filled in by checkrom.py */, > .OemIdStringPointer = (u32)"SeaBIOS", > .AcpiRsdPtrPointer = (u32)&csm_rsdp, > +#if CONFIG_MALLOC_UPPERMEMORY > + .UmaAddress = (u32)&zonelow_base, > + .UmaSize = 0x10000, > +#endif
Is there an advantage to setting this at compile time vs only setting these fields during runtime? > @@ -49,6 +53,11 @@ csm_return(struct bregs *regs) > dprintf(3, "handle_csm returning AX=%04x\n", regs->ax); > > PICMask = pic_irqmask_read(); > + if (CONFIG_MALLOC_UPPERMEMORY) { > + u32 top = rom_get_max(); > + csm_compat_table.UmaAddress = top; > + csm_compat_table.UmaSize = (u32)zonelow_base + 0x10000 - top; > + } Would this work instead? u32 rommax = rom_get_max(); extern u8 final_readonly_start[]; csm_compat_table.UmaAddress = rommax; csm_compat_table.UmaSize = (u32)final_readonly_start - rommax; This should result in the same values as your patch when CONFIG_MALLOC_UPPERMEMORY. For !CONFIG_MALLOC_UPPERMEMORY it will result in UmaAddress==final_readonly_start and UmaSize==0. -Kevin _______________________________________________ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios