On Sat, May 23, 2020 at 11:10:24PM +0200, Paul Menzel wrote:
> From: Stefan Reinauer <reina...@chromium.org>
> 
> If SeaBIOS is run as a payload via coreboot (and presumably as a
> CSM), then it's possible the keyboard or mouse will still be
> enabled.  This can lead to data being queued even after the flush
> function attempts to clear the queue.
> 
> Disabling the keyboard/mouse prior to flushing is pretty standard
> in DOS programming so it's not surprising that it's needed here.
> 
> I believe this problem manifests with the Chromebook Pixel.  People
> have reported that sometimes the 'ESC to Select Boot Devices'
> doesn't work.  I can reproduce this faithfully by holding 'Ctrl-L'
> in the firmware screen during SeaBIOS initialization.
> 
> I can't test this fix on an actual Pixel because I don't know how
> to update SeaBIOS but I have tested the patch under QEMU.

This was fixed (to the best of my knowledge) with commit dbf9dd27.

-Kevin


> 
> BUG=none
> TEST=Boot into SeaBIOS, press ESC, see it working.
> 
> Change-Id: I4e74a559e86539730f4fda1d429612c759da16ee
> Signed-off-by: Anthony Liguori <aligu...@us.ibm.com>
> Signed-off-by: Stefan Reinauer <reina...@google.com>
> Reviewed-on: https://gerrit.chromium.org/gerrit/49212
> Reviewed-by: Ronald G. Minnich <rminn...@chromium.org>
> Cc: Matt DeVillier <matt.devill...@gmail.com>
> Signed-off-by: Paul Menzel <pmen...@molgen.mpg.de>
> ---
>  src/hw/ps2port.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/src/hw/ps2port.c b/src/hw/ps2port.c
> index 9b099e8..c99ea54 100644
> --- a/src/hw/ps2port.c
> +++ b/src/hw/ps2port.c
> @@ -58,6 +58,12 @@ static int
>  i8042_flush(void)
>  {
>      dprintf(7, "i8042_flush\n");
> +
> +    /* Disable the keyboard and mouse to prevent additional data from
> +     * being queued. */
> +    outb(0xad, PORT_PS2_STATUS);
> +    outb(0xa7, PORT_PS2_STATUS);
> +
>      int i;
>      for (i=0; i<I8042_BUFFER_SIZE; i++) {
>          u8 status = inb(PORT_PS2_STATUS);
> -- 
> 2.27.0.rc0
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