Re: [PATCH] drm/amdgpu/swSMU/navi: add feature toggles for more things
Reviewed-by: Kevin Wang Best Regards, Kevin On 10/9/19 9:17 PM, Alex Deucher wrote: > Add toggles for more power features. Helpful in debugging. > > Signed-off-by: Alex Deucher > --- > drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 24 -- > 1 file changed, 18 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > index a583cf87b514..8e1f3be8ba6f 100644 > --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > @@ -328,11 +328,7 @@ navi10_get_allowed_feature_mask(struct smu_context *smu, > memset(feature_mask, 0, sizeof(uint32_t) * num); > > *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT) > - | FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT) > - | FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT) > | FEATURE_MASK(FEATURE_DPM_MP0CLK_BIT) > - | FEATURE_MASK(FEATURE_DPM_LINK_BIT) > - | FEATURE_MASK(FEATURE_GFX_ULV_BIT) > | FEATURE_MASK(FEATURE_RSMU_SMN_CG_BIT) > | FEATURE_MASK(FEATURE_DS_SOCCLK_BIT) > | FEATURE_MASK(FEATURE_PPT_BIT) > @@ -342,8 +338,6 @@ navi10_get_allowed_feature_mask(struct smu_context *smu, > | FEATURE_MASK(FEATURE_FAN_CONTROL_BIT) > | FEATURE_MASK(FEATURE_THERMAL_BIT) > | FEATURE_MASK(FEATURE_LED_DISPLAY_BIT) > - | FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT) > - | FEATURE_MASK(FEATURE_DS_GFXCLK_BIT) > | FEATURE_MASK(FEATURE_DS_DCEFCLK_BIT) > | FEATURE_MASK(FEATURE_FW_DSTATE_BIT) > | FEATURE_MASK(FEATURE_BACO_BIT) > @@ -352,11 +346,29 @@ navi10_get_allowed_feature_mask(struct smu_context *smu, > | FEATURE_MASK(FEATURE_APCC_DFLL_BIT) > | FEATURE_MASK(FEATURE_FW_CTF_BIT); > > + if (adev->pm.pp_feature & PP_SOCCLK_DPM_MASK) > + *(uint64_t *)feature_mask |= > FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT); > + > + if (adev->pm.pp_feature & PP_SCLK_DPM_MASK) > + *(uint64_t *)feature_mask |= > FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT); > + > + if (adev->pm.pp_feature & PP_PCIE_DPM_MASK) > + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_LINK_BIT); > + > + if (adev->pm.pp_feature & PP_DCEFCLK_DPM_MASK) > + *(uint64_t *)feature_mask |= > FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT); > + > if (adev->pm.pp_feature & PP_MCLK_DPM_MASK) > *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_UCLK_BIT) > | FEATURE_MASK(FEATURE_MEM_VDDCI_SCALING_BIT) > | FEATURE_MASK(FEATURE_MEM_MVDD_SCALING_BIT); > > + if (adev->pm.pp_feature & PP_ULV_MASK) > + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_ULV_BIT); > + > + if (adev->pm.pp_feature & PP_SCLK_DEEP_SLEEP_MASK) > + *(uint64_t *)feature_mask |= > FEATURE_MASK(FEATURE_DS_GFXCLK_BIT); > + > if (adev->pm.pp_feature & PP_GFXOFF_MASK) { > *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFXOFF_BIT); > /* TODO: remove it once fw fix the bug */ ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
RE: [PATCH] drm/amdgpu/swSMU/navi: add feature toggles for more things
Reviewed-by: Evan Quan -Original Message- From: amd-gfx On Behalf Of Alex Deucher Sent: Wednesday, October 9, 2019 9:17 PM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander Subject: [PATCH] drm/amdgpu/swSMU/navi: add feature toggles for more things Add toggles for more power features. Helpful in debugging. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 24 -- 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c index a583cf87b514..8e1f3be8ba6f 100644 --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c @@ -328,11 +328,7 @@ navi10_get_allowed_feature_mask(struct smu_context *smu, memset(feature_mask, 0, sizeof(uint32_t) * num); *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT) - | FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT) - | FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT) | FEATURE_MASK(FEATURE_DPM_MP0CLK_BIT) - | FEATURE_MASK(FEATURE_DPM_LINK_BIT) - | FEATURE_MASK(FEATURE_GFX_ULV_BIT) | FEATURE_MASK(FEATURE_RSMU_SMN_CG_BIT) | FEATURE_MASK(FEATURE_DS_SOCCLK_BIT) | FEATURE_MASK(FEATURE_PPT_BIT) @@ -342,8 +338,6 @@ navi10_get_allowed_feature_mask(struct smu_context *smu, | FEATURE_MASK(FEATURE_FAN_CONTROL_BIT) | FEATURE_MASK(FEATURE_THERMAL_BIT) | FEATURE_MASK(FEATURE_LED_DISPLAY_BIT) - | FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT) - | FEATURE_MASK(FEATURE_DS_GFXCLK_BIT) | FEATURE_MASK(FEATURE_DS_DCEFCLK_BIT) | FEATURE_MASK(FEATURE_FW_DSTATE_BIT) | FEATURE_MASK(FEATURE_BACO_BIT) @@ -352,11 +346,29 @@ navi10_get_allowed_feature_mask(struct smu_context *smu, | FEATURE_MASK(FEATURE_APCC_DFLL_BIT) | FEATURE_MASK(FEATURE_FW_CTF_BIT); + if (adev->pm.pp_feature & PP_SOCCLK_DPM_MASK) + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT); + + if (adev->pm.pp_feature & PP_SCLK_DPM_MASK) + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT); + + if (adev->pm.pp_feature & PP_PCIE_DPM_MASK) + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_LINK_BIT); + + if (adev->pm.pp_feature & PP_DCEFCLK_DPM_MASK) + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT); + if (adev->pm.pp_feature & PP_MCLK_DPM_MASK) *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_UCLK_BIT) | FEATURE_MASK(FEATURE_MEM_VDDCI_SCALING_BIT) | FEATURE_MASK(FEATURE_MEM_MVDD_SCALING_BIT); + if (adev->pm.pp_feature & PP_ULV_MASK) + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_ULV_BIT); + + if (adev->pm.pp_feature & PP_SCLK_DEEP_SLEEP_MASK) + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DS_GFXCLK_BIT); + if (adev->pm.pp_feature & PP_GFXOFF_MASK) { *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFXOFF_BIT); /* TODO: remove it once fw fix the bug */ -- 2.20.1 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH] drm/amdgpu/swSMU/navi: add feature toggles for more things
Add toggles for more power features. Helpful in debugging. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 24 -- 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c index a583cf87b514..8e1f3be8ba6f 100644 --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c @@ -328,11 +328,7 @@ navi10_get_allowed_feature_mask(struct smu_context *smu, memset(feature_mask, 0, sizeof(uint32_t) * num); *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT) - | FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT) - | FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT) | FEATURE_MASK(FEATURE_DPM_MP0CLK_BIT) - | FEATURE_MASK(FEATURE_DPM_LINK_BIT) - | FEATURE_MASK(FEATURE_GFX_ULV_BIT) | FEATURE_MASK(FEATURE_RSMU_SMN_CG_BIT) | FEATURE_MASK(FEATURE_DS_SOCCLK_BIT) | FEATURE_MASK(FEATURE_PPT_BIT) @@ -342,8 +338,6 @@ navi10_get_allowed_feature_mask(struct smu_context *smu, | FEATURE_MASK(FEATURE_FAN_CONTROL_BIT) | FEATURE_MASK(FEATURE_THERMAL_BIT) | FEATURE_MASK(FEATURE_LED_DISPLAY_BIT) - | FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT) - | FEATURE_MASK(FEATURE_DS_GFXCLK_BIT) | FEATURE_MASK(FEATURE_DS_DCEFCLK_BIT) | FEATURE_MASK(FEATURE_FW_DSTATE_BIT) | FEATURE_MASK(FEATURE_BACO_BIT) @@ -352,11 +346,29 @@ navi10_get_allowed_feature_mask(struct smu_context *smu, | FEATURE_MASK(FEATURE_APCC_DFLL_BIT) | FEATURE_MASK(FEATURE_FW_CTF_BIT); + if (adev->pm.pp_feature & PP_SOCCLK_DPM_MASK) + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT); + + if (adev->pm.pp_feature & PP_SCLK_DPM_MASK) + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT); + + if (adev->pm.pp_feature & PP_PCIE_DPM_MASK) + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_LINK_BIT); + + if (adev->pm.pp_feature & PP_DCEFCLK_DPM_MASK) + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT); + if (adev->pm.pp_feature & PP_MCLK_DPM_MASK) *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_UCLK_BIT) | FEATURE_MASK(FEATURE_MEM_VDDCI_SCALING_BIT) | FEATURE_MASK(FEATURE_MEM_MVDD_SCALING_BIT); + if (adev->pm.pp_feature & PP_ULV_MASK) + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_ULV_BIT); + + if (adev->pm.pp_feature & PP_SCLK_DEEP_SLEEP_MASK) + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DS_GFXCLK_BIT); + if (adev->pm.pp_feature & PP_GFXOFF_MASK) { *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFXOFF_BIT); /* TODO: remove it once fw fix the bug */ -- 2.20.1 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx