Re: Oselas 2018.12.0 toolchain seems to break barebox for AM335x
On 2019-11-12 12:00 p.m., Sascha Hauer wrote: Sorry for the delay, I probably knew this issue will be something unfortunate to look at... No Problem, thanks for your hard work. :) The second solution is to add -fPIE to CPPFLAGS which is a more general approach. I'd like to give this a try in -next. I tried this more generic, second approach on our local setup and it works. \o/ Thanks and kind regards Andreas ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 1/1] net: designware: eqos: stop DMA on halt
On Mon, Nov 11, 2019 at 10:56:07AM +0100, Ahmad Fatoum wrote: > designware_eqos.c contains an eqos_stop implementation to stop the NIC > when halting the interface. Unfortunately it wasn't used leading to > memory corruption on boot, possibly due to DMA. Fix this. > > Signed-off-by: Ahmad Fatoum > --- Applied to master, thanks Sascha -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH] ARM: start: check for machine type last
On Thu, Nov 07, 2019 at 09:12:56PM +0100, Lucas Stach wrote: > A valid DTB may reside low in the Barebox binary address map. If this > binary is started at a very low address, we might mistake the pointer > for a machine type. Make sure to check for all other possibilities first > before interpreting the boarddata as a raw machine type. > > Fixes: 19c24e2f0121 (ARM: start: Allow to pass machine type as boarddata) > Signed-off-by: Lucas Stach > --- > arch/arm/cpu/start.c | 22 +++--- > 1 file changed, 11 insertions(+), 11 deletions(-) Applied, thanks Sascha -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH v4 1/5] i.mx6: signed boot: add habv4-imx6-gencsf.h to the flash header of the PHYTEC boards
Hi Maik, On Wed, Aug 21, 2019 at 04:21:44PM +0200, Maik Otto wrote: > the habv4-imx6-gencsf.h is necessary in the board flash header to build > a signed barebox Applied now. Please note that in the meantime it is no longer necessary to put the public key for the FIT image into the device tree source file. We can now specify the path to the key (or alternatively, a PKCS#11 URI) in Kconfig using the CONFIG_CRYPTO_RSA_KEY option: 9341918ba8 fit-image: Use compiled-in keys b39100bcea rsa: Allow to directly compile in rsa public keys What I missed to mention explicitly is that CONFIG_CRYPTO_RSA_KEY can be specified as "__ENV__FOOBAR". When done like this the path (or PKCS#11 URI) is taken from the environment variable FOOBAR. This is done to help build systems which then no longer have to patch the CONFIG_CRYPTO_RSA_KEY option in the barebox config file. You might want to give it a try, it could simplify your workflow with the keys. Sascha -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH] ARM: Compile with -fPIE
Early code in barebox often runs at an address the binary is not linked at. This causes problems for example when simple initializations in a switch are converted to an array lookup (-ftree-switch-conversion). These arrays are then addressed where they are linked at. Some code where this is known to cause problems is already compiled with -fno-tree-switch-conversion. This however is limited to single files. This patch compiles barebox with -fPIE enabled. This causes such tables to be looked up PC relative rather than with its absolute address. This makes the -fno-tree-switch-conversion and -fno-jump-table options unnecessary. Signed-off-by: Sascha Hauer --- arch/arm/Makefile| 3 +++ arch/arm/boards/nvidia-beaver/Makefile | 4 +--- arch/arm/boards/nvidia-jetson-tk1/Makefile | 4 +--- arch/arm/boards/toradex-colibri-t20/Makefile | 6 ++ arch/arm/boards/toshiba-ac100/Makefile | 4 +--- arch/arm/boards/zii-imx51-rdu1/Makefile | 1 - arch/arm/boards/zii-imx7d-dev/Makefile | 1 - arch/arm/boards/zii-vf610-dev/Makefile | 1 - arch/arm/mach-omap/Makefile | 2 -- arch/arm/mach-tegra/Makefile | 12 ++-- 10 files changed, 10 insertions(+), 28 deletions(-) diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 13e8cee286..740b0790e7 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -141,6 +141,9 @@ CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) CPPFLAGS += -fdata-sections -ffunction-sections LDFLAGS_barebox += --gc-sections +# early code often runs at addresses we are not linked at +CPPFLAGS += -fPIE + ifdef CONFIG_RELOCATABLE LDFLAGS_barebox += -pie else diff --git a/arch/arm/boards/nvidia-beaver/Makefile b/arch/arm/boards/nvidia-beaver/Makefile index 7ade54e854..f0eb7b2de0 100644 --- a/arch/arm/boards/nvidia-beaver/Makefile +++ b/arch/arm/boards/nvidia-beaver/Makefile @@ -1,6 +1,4 @@ -CFLAGS_pbl-entry.o := \ - -mcpu=arm7tdmi -march=armv4t \ - -fno-tree-switch-conversion -fno-jump-tables +CFLAGS_pbl-entry.o := -mcpu=arm7tdmi -march=armv4t soc := tegra30 lwl-y += entry.o obj-y += board.o diff --git a/arch/arm/boards/nvidia-jetson-tk1/Makefile b/arch/arm/boards/nvidia-jetson-tk1/Makefile index 16b203f9f3..5487f0289a 100644 --- a/arch/arm/boards/nvidia-jetson-tk1/Makefile +++ b/arch/arm/boards/nvidia-jetson-tk1/Makefile @@ -1,6 +1,4 @@ -CFLAGS_pbl-entry.o := \ - -mcpu=arm7tdmi -march=armv4t \ - -fno-tree-switch-conversion -fno-jump-tables +CFLAGS_pbl-entry.o := -mcpu=arm7tdmi -march=armv4t soc := tegra124 lwl-y += entry.o obj-y += board.o diff --git a/arch/arm/boards/toradex-colibri-t20/Makefile b/arch/arm/boards/toradex-colibri-t20/Makefile index d0347f2382..644a8e5269 100644 --- a/arch/arm/boards/toradex-colibri-t20/Makefile +++ b/arch/arm/boards/toradex-colibri-t20/Makefile @@ -1,9 +1,7 @@ -CFLAGS_pbl-entry.o := \ - -mcpu=arm7tdmi -march=armv4t \ - -fno-tree-switch-conversion -fno-jump-tables +CFLAGS_pbl-entry.o := -mcpu=arm7tdmi -march=armv4t soc := tegra20 lwl-y += entry.o obj-y += board.o extra-y += colibri-t20_256_hsmmc.bct colibri-t20_256_v11_nand.bct \ colibri-t20_256_v12_nand.bct colibri-t20_512_hsmmc.bct \ - colibri-t20_512_v11_nand.bct colibri-t20_512_v12_nand.bct \ No newline at end of file + colibri-t20_512_v11_nand.bct colibri-t20_512_v12_nand.bct diff --git a/arch/arm/boards/toshiba-ac100/Makefile b/arch/arm/boards/toshiba-ac100/Makefile index 2b6c09e279..4ef18c0ce9 100644 --- a/arch/arm/boards/toshiba-ac100/Makefile +++ b/arch/arm/boards/toshiba-ac100/Makefile @@ -1,5 +1,3 @@ -CFLAGS_pbl-entry.o := \ - -mcpu=arm7tdmi -march=armv4t \ - -fno-tree-switch-conversion -fno-jump-tables +CFLAGS_pbl-entry.o := -mcpu=arm7tdmi -march=armv4t lwl-y += entry.o obj-y += board.o diff --git a/arch/arm/boards/zii-imx51-rdu1/Makefile b/arch/arm/boards/zii-imx51-rdu1/Makefile index 604b3621be..01c7a259e9 100644 --- a/arch/arm/boards/zii-imx51-rdu1/Makefile +++ b/arch/arm/boards/zii-imx51-rdu1/Makefile @@ -1,3 +1,2 @@ obj-y += board.o -CFLAGS_pbl-lowlevel.o := -fno-tree-switch-conversion -fno-jump-tables lwl-y += lowlevel.o diff --git a/arch/arm/boards/zii-imx7d-dev/Makefile b/arch/arm/boards/zii-imx7d-dev/Makefile index e1baed17ba..01c7a259e9 100644 --- a/arch/arm/boards/zii-imx7d-dev/Makefile +++ b/arch/arm/boards/zii-imx7d-dev/Makefile @@ -1,3 +1,2 @@ -CFLAGS_pbl-lowlevel.o := -fno-tree-switch-conversion -fno-jump-tables obj-y += board.o lwl-y += lowlevel.o diff --git a/arch/arm/boards/zii-vf610-dev/Makefile b/arch/arm/boards/zii-vf610-dev/Makefile index 3c3a3f2387..1297d815e3 100644 --- a/arch/arm/boards/zii-vf610-dev/Makefile +++ b/arch/arm/boards/zii-vf610-dev/Makefile @@ -1,4 +1,3 @@ obj-y += board.o -CFLAGS_pbl-lowlevel.o := -fno-tree-switch-conversion -fno-jump-tables lwl-y += lowlevel.o bbenv-y += defaultenv-zii-vf610-dev diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Make
Re: Oselas 2018.12.0 toolchain seems to break barebox for AM335x
Hi Andreas, On Tue, Nov 12, 2019 at 08:48:04AM +0100, Andreas Geisenhainer wrote: > Good day, everyone. > > *bump* > > On 2019-10-25 10:48 a.m., Andreas Geisenhainer wrote: > > Hello Sascha, hello barebox-ml. > > > > > On 2019-07-10 9:58 a.m., Sascha Hauer wrote: > > >> On Mon, Jul 08, 2019 at 04:15:00PM +0200, Andreas Geisenhainer wrote: > > >>> We're running barebox an a Phytec PhyCORE AM335x platform, and the > > >>> behaviour does emerge for the default > > >>> "barebox-am335x-phytec-phycore.img" > > >>> image from barebox. > > >> I just tried to reproduce this on a beaglebone black as this is at > > least > > >> the same SoC. Unfortunately I was not successful. > > > > I finally found the time to reproduce this on a beaglebone black. > > I tried two different barebox versions (v2018.03 and v2019.10) > > without any changes to the source. > > > > My current steps where > > > > 1) make am335x_mlo_defconfig / am335x_defconfig > > (depending on the version) > > 2) make > > 3) copied two files onto the uSD card I booted the boneblack > > from: > > - barebox-am33xx-beaglebone.img (I) > > - barebox-am33xx-phytec-phycore.img (II) > > 4) booted the boneblack and loaded each file manually using the > > `bootm` command. > > > > > > I'm working under the following assumption: > > a) the beagleboneblack image is working for our AM335x-phycore > > b) the phytec-phycore image should work on a boneblack > > (at least rudimentary) > > > > When I'm using the OSELAS.2018.02.0 toolchain a) und b) hold up. > > Additionally we get > > c) on the boneblack both images (I) and (II) are working > > > > With the OSELAS.2019.09.0 toolchain, the boneblack image (I) is > > working on the boneblack, but the phycore-image (II) is not. > > > > There seem to be at least two slightly different behaviors > > I've been observing: > > Yesterday it justs stops working, no further output, nothing (see Part > > B) within attachment. > > Two days ago it complained about a "unhandled NULL pointer dereference", > > followed by a reset of the chip (i captured that within the attachment > > at C). > > > > One more point: I've chosen to build the toolchains for > > "arm-cortexa8-linux-gnueabihf". > > To rule out problems with this decision I build a more generic > > "arm-v7a-linux-gnueabihf" > > one, but the problem persists with it, too. > > > > Is there anything more I can do on my end? > > I'm open for any ideas, here. :) > > Was anyone able find something regarding this? > > Do some crazy ideas exist anywhere? Sorry for the delay, I probably knew this issue will be something unfortunate to look at... Anyway, I can reproduce this issue here. The problem goes down to am335x_sdram_size() which is executed at an address which it is not linked at. Beginning from a certain compiler version gcc is clever enough to compile the switch/case used there to assign a variable as a lookup table placed in the data section. This table is looked for not at the address we are running at (somewhere in SDRAM), but at an offset to the address we are linked at (0x0). There are two solutions to this, first one I'd like to apply to master, see appended patch. This is only a local change to the affected file. However, other files may suffer from the same issue. The second solution is to add -fPIE to CPPFLAGS which is a more general approach. I'd like to give this a try in -next. Sascha -8<--- >From 3b8b70bfd743c303349f67c892631cb04c2b3c68 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 12 Nov 2019 11:53:48 +0100 Subject: [PATCH] ARM: am335x: Fix am335x_sdram_size() not running at link address am335x_sdram_size() may be called when we are not running at the address we are linked at. This means tree switch conversions and jump tables will not work. Disable these in the CFLAGS for this file. This fixes a crash in am335x_sdram_size() with newer gcc versions. Signed-off-by: Sascha Hauer --- arch/arm/mach-omap/Makefile | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile index 36b2aa090e..06cd191f95 100644 --- a/arch/arm/mach-omap/Makefile +++ b/arch/arm/mach-omap/Makefile @@ -22,6 +22,8 @@ pbl-$(CONFIG_ARCH_OMAP3) += omap3_generic.o auxcr.o obj-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o pbl-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o obj-pbl-$(CONFIG_ARCH_AM33XX) += am33xx_generic.o am33xx_clock.o am33xx_mux.o am3xxx.o +CFLAGS_pbl-am33xx_generic.o := -fno-tree-switch-conversion -fno-jump-tables +CFLAGS_am33xx_generic.o := -fno-tree-switch-conversion -fno-jump-tables obj-pbl-$(CONFIG_ARCH_AM35XX) += am3xxx.o am35xx_emif4.o obj-$(CONFIG_ARCH_AM33XX) += am33xx_scrm.o obj-$(CONFIG_ARCH_OMAP3) += omap3_clock.o -- 2.24.0.rc1 -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengu
[PATCH 04/10] watchdog: stm32_iwdg: return -ENOSYS on attempt to disable
The stm32_iwdg watchdog can't be disabled. To have the wd commant report this fact correctly to the user, the ->set_timeout needs to return -ENOSYS which is interpreted as "Watchdog cannot be disabled" instead of -EINVAL which means "Timeout value out of range". Signed-off-by: Ahmad Fatoum --- drivers/watchdog/stm32_iwdg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/watchdog/stm32_iwdg.c b/drivers/watchdog/stm32_iwdg.c index 4d252e558c32..808d7c83720e 100644 --- a/drivers/watchdog/stm32_iwdg.c +++ b/drivers/watchdog/stm32_iwdg.c @@ -132,7 +132,7 @@ static int stm32_iwdg_set_timeout(struct watchdog *wdd, unsigned int timeout) int ret; if (!timeout) - return -EINVAL; /* can't disable */ + return -ENOSYS; /* can't disable */ if (timeout > wdd->timeout_max) return -EINVAL; -- 2.24.0.rc1 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 07/10] ARM: stm32mp: add helper for querying ram size
The STM32MP DDR Controller has a very flexible way of mapping address
bits to columns/rows/banks. This is so far configured by the ARM TF-A
as part of the SDRAM setup, so we don't need to do this in barebox.
Nevertheless reading it out in barebox, allows us to determine unused
address bits and thus the total size of SDRAM configured.
Add a barebox_arm_entry wrapper that computes the SDRAM size internally,
so boards may drop their hard-coded RAM size specifications.
Signed-off-by: Ahmad Fatoum
---
arch/arm/mach-stm32mp/Makefile| 1 +
arch/arm/mach-stm32mp/ddrctrl.c | 121 ++
arch/arm/mach-stm32mp/include/mach/ddr_regs.h | 368 ++
arch/arm/mach-stm32mp/include/mach/entry.h| 8 +
arch/arm/mach-stm32mp/include/mach/stm32.h| 2 +
5 files changed, 500 insertions(+)
create mode 100644 arch/arm/mach-stm32mp/ddrctrl.c
create mode 100644 arch/arm/mach-stm32mp/include/mach/ddr_regs.h
create mode 100644 arch/arm/mach-stm32mp/include/mach/entry.h
diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile
index 6f495288923a..8e14b225359d 100644
--- a/arch/arm/mach-stm32mp/Makefile
+++ b/arch/arm/mach-stm32mp/Makefile
@@ -1,2 +1,3 @@
obj-y := init.o
+obj-pbl-y := ddrctrl.o
obj-$(CONFIG_BOOTM) += stm32image.o
diff --git a/arch/arm/mach-stm32mp/ddrctrl.c b/arch/arm/mach-stm32mp/ddrctrl.c
new file mode 100644
index ..90fb5e8956d0
--- /dev/null
+++ b/arch/arm/mach-stm32mp/ddrctrl.c
@@ -0,0 +1,121 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Ahmad Fatoum
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define ADDRMAP1_BANK_B0 GENMASK( 5, 0)
+#define ADDRMAP1_BANK_B1 GENMASK(13, 8)
+#define ADDRMAP1_BANK_B2 GENMASK(21, 16)
+
+#define ADDRMAP2_COL_B2GENMASK( 3, 0)
+#define ADDRMAP2_COL_B3GENMASK(11, 8)
+#define ADDRMAP2_COL_B4GENMASK(19, 16)
+#define ADDRMAP2_COL_B5GENMASK(27, 24)
+
+#define ADDRMAP3_COL_B6GENMASK( 3, 0)
+#define ADDRMAP3_COL_B7GENMASK(12, 8)
+#define ADDRMAP3_COL_B8GENMASK(20, 16)
+#define ADDRMAP3_COL_B9GENMASK(28, 24)
+
+#define ADDRMAP4_COL_B10 GENMASK( 4, 0)
+#define ADDRMAP4_COL_B11 GENMASK(12, 8)
+
+#define ADDRMAP5_ROW_B0GENMASK( 3, 0)
+#define ADDRMAP5_ROW_B1GENMASK(11, 8)
+#define ADDRMAP5_ROW_B2_10 GENMASK(19, 16)
+#define ADDRMAP5_ROW_B11 GENMASK(27, 24)
+
+#define ADDRMAP6_ROW_B12 GENMASK( 3, 0)
+#define ADDRMAP6_ROW_B13 GENMASK(11, 8)
+#define ADDRMAP6_ROW_B14 GENMASK(19, 16)
+#define ADDRMAP6_ROW_B15 GENMASK(27, 24)
+
+#define ADDRMAP9_ROW_B2GENMASK( 3, 0)
+#define ADDRMAP9_ROW_B3GENMASK(11, 8)
+#define ADDRMAP9_ROW_B4GENMASK(19, 16)
+#define ADDRMAP9_ROW_B5GENMASK(27, 24)
+
+#define ADDRMAP10_ROW_B6 GENMASK( 3, 0)
+#define ADDRMAP10_ROW_B7 GENMASK(11, 8)
+#define ADDRMAP10_ROW_B8 GENMASK(19, 16)
+#define ADDRMAP10_ROW_B9 GENMASK(27, 24)
+
+#define ADDRMAP11_ROW_B10 GENMASK( 3, 0)
+
+#define LINE_UNUSED(reg, mask) (((reg) & (mask)) == (mask))
+
+enum ddrctrl_buswidth {
+ BUSWIDTH_FULL = 0,
+ BUSWIDTH_HALF = 1,
+ BUSWIDTH_QUARTER = 2
+};
+
+static unsigned long ddrctrl_addrmap_ramsize(struct stm32mp1_ddrctl __iomem *d,
+enum ddrctrl_buswidth buswidth)
+{
+ unsigned banks = 3, cols = 12, rows = 16;
+ u32 reg;
+
+ cols += buswidth;
+
+ reg = readl(&d->addrmap1);
+ if (LINE_UNUSED(reg, ADDRMAP1_BANK_B2)) banks--;
+ if (LINE_UNUSED(reg, ADDRMAP1_BANK_B1)) banks--;
+ if (LINE_UNUSED(reg, ADDRMAP1_BANK_B0)) banks--;
+
+ reg = readl(&d->addrmap2);
+ if (LINE_UNUSED(reg, ADDRMAP2_COL_B5)) cols--;
+ if (LINE_UNUSED(reg, ADDRMAP2_COL_B4)) cols--;
+ if (LINE_UNUSED(reg, ADDRMAP2_COL_B3)) cols--;
+ if (LINE_UNUSED(reg, ADDRMAP2_COL_B2)) cols--;
+
+ reg = readl(&d->addrmap3);
+ if (LINE_UNUSED(reg, ADDRMAP3_COL_B9)) cols--;
+ if (LINE_UNUSED(reg, ADDRMAP3_COL_B8)) cols--;
+ if (LINE_UNUSED(reg, ADDRMAP3_COL_B7)) cols--;
+ if (LINE_UNUSED(reg, ADDRMAP3_COL_B6)) cols--;
+
+ reg = readl(&d->addrmap4);
+ if (LINE_UNUSED(reg, ADDRMAP4_COL_B11)) cols--;
+ if (LINE_UNUSED(reg, ADDRMAP4_COL_B10)) cols--;
+
+ reg = readl(&d->addrmap5);
+ if (LINE_UNUSED(reg, ADDRMAP5_ROW_B11)) rows--;
+
+ reg = readl(&d->addrmap6);
+ if (LINE_UNUSED(reg, ADDRMAP6_ROW_B15)) rows--;
+ if (LINE_UNUSED(reg, ADDRMAP6_ROW_B14)) rows--;
+ if (LINE_UNUSED(reg, ADDRMAP6_ROW_B13)) rows--;
+ if (LINE_UNUSED(reg, ADDRMAP6_ROW_B12)) rows--;
+
+ return memory_sdram_size(cols, rows, BIT(banks), 4 / BIT(buswidth));
[PATCH 03/10] mfd: stpmic1: use register define from header
A previous commit has copied over the upstream
header. Use it instead of replicating register definitions in the
MFD and watchdog cell driver. No functional change.
Signed-off-by: Ahmad Fatoum
---
drivers/mfd/stpmic1.c | 3 +--
drivers/watchdog/stpmic1_wdt.c | 28
2 files changed, 13 insertions(+), 18 deletions(-)
diff --git a/drivers/mfd/stpmic1.c b/drivers/mfd/stpmic1.c
index eae6fe3a4e05..ab13ded0ecfe 100644
--- a/drivers/mfd/stpmic1.c
+++ b/drivers/mfd/stpmic1.c
@@ -12,8 +12,7 @@
#include
#include
#include
-
-#define VERSION_SR 0x6
+#include
struct stpmic1 {
struct device_d *dev;
diff --git a/drivers/watchdog/stpmic1_wdt.c b/drivers/watchdog/stpmic1_wdt.c
index 9b7a586387db..40273ffc4c85 100644
--- a/drivers/watchdog/stpmic1_wdt.c
+++ b/drivers/watchdog/stpmic1_wdt.c
@@ -14,22 +14,15 @@
#include
#include
-#define RESTART_SR 0x05
-#define MAIN_CR0x10
-#define WCHDG_CR 0x1B
-#define WCHDG_TIMER_CR 0x1C
+#include
-/* Restart Status Register (RESTART_SR) */
+/* Restart Status Register (RREQ_STATE_SR) */
#define R_RST BIT(0)
#define R_SWOFFBIT(1)
#define R_WDG BIT(2)
#define R_PKEYLKP BIT(3)
#define R_VINOK_FA BIT(4)
-/* Main PMIC Control Register (MAIN_CR) */
-#define SWOFF BIT(0)
-#define RREQ_EN BIT(1)
-
/* Watchdog Control Register (WCHDG_CR) */
#define WDT_START BIT(0)
#define WDT_PING BIT(1)
@@ -106,8 +99,9 @@ static void __noreturn stpmic1_restart_handler(struct
restart_handler *rst)
{
struct stpmic1_wdt *wdt = container_of(rst, struct stpmic1_wdt,
restart);
- regmap_write_bits(wdt->regmap, MAIN_CR,
- SWOFF | RREQ_EN, SWOFF | RREQ_EN);
+ regmap_write_bits(wdt->regmap, SWOFF_PWRCTRL_CR,
+ SOFTWARE_SWITCH_OFF_ENABLED | RESTART_REQUEST_ENABLED,
+ SOFTWARE_SWITCH_OFF_ENABLED |
RESTART_REQUEST_ENABLED);
mdelay(1000);
hang();
@@ -119,8 +113,9 @@ static void __noreturn stpmic1_poweroff(struct
poweroff_handler *handler)
shutdown_barebox();
- regmap_write_bits(wdt->regmap, MAIN_CR,
- SWOFF | RREQ_EN, SWOFF);
+ regmap_write_bits(wdt->regmap, SWOFF_PWRCTRL_CR,
+ SOFTWARE_SWITCH_OFF_ENABLED | RESTART_REQUEST_ENABLED,
+ SOFTWARE_SWITCH_OFF_ENABLED);
mdelay(1000);
hang();
@@ -142,7 +137,7 @@ static int stpmic1_set_reset_reason(struct regmap *map)
int ret;
int i, instance = 0;
- ret = regmap_read(map, RESTART_SR, ®);
+ ret = regmap_read(map, RREQ_STATE_SR, ®);
if (ret)
return ret;
@@ -156,7 +151,7 @@ static int stpmic1_set_reset_reason(struct regmap *map)
reset_source_set_prinst(type, 400, instance);
- pr_info("STPMIC1 reset reason %s (RESTART_SR: 0x%08x)\n",
+ pr_info("STPMIC1 reset reason %s (RREQ_STATE_SR: 0x%08x)\n",
reset_source_name(), reg);
return 0;
@@ -180,7 +175,8 @@ static int stpmic1_wdt_probe(struct device_d *dev)
wdd->timeout_max = PMIC_WDT_MAX_TIMEOUT;
/* have the watchdog reset, not power-off the system */
- regmap_write_bits(wdt->regmap, MAIN_CR, RREQ_EN, RREQ_EN);
+ regmap_write_bits(wdt->regmap, SWOFF_PWRCTRL_CR,
+ RESTART_REQUEST_ENABLED, RESTART_REQUEST_ENABLED);
ret = watchdog_register(wdd);
if (ret) {
--
2.24.0.rc1
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[PATCH 02/10] ARM: stm32mp157c-dk2: add optional DEBUG_LL print to entry point
The TF-A sets up pin muxing and clocking for the UART4 which is the UART
suggested by ST for use as debug console.
Eventually, we might want to do this ourselves to be sure, but for now
lets just stick in a putc_ll('>'), so user selecting DEBUG_LL can see
that barebox started.
Signed-off-by: Ahmad Fatoum
---
arch/arm/boards/stm32mp157c-dk2/lowlevel.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boards/stm32mp157c-dk2/lowlevel.c
b/arch/arm/boards/stm32mp157c-dk2/lowlevel.c
index 566ace79c956..2106eaadc93a 100644
--- a/arch/arm/boards/stm32mp157c-dk2/lowlevel.c
+++ b/arch/arm/boards/stm32mp157c-dk2/lowlevel.c
@@ -7,12 +7,21 @@
extern char __dtb_z_stm32mp157c_dk2_start[];
+static void setup_uart(void)
+{
+ /* first stage has set up the UART, so nothing to do here */
+ putc_ll('>');
+}
+
ENTRY_FUNCTION(start_stm32mp157c_dk2, r0, r1, r2)
{
void *fdt;
arm_cpu_lowlevel_init();
+ if (IS_ENABLED(CONFIG_DEBUG_LL))
+ setup_uart();
+
fdt = __dtb_z_stm32mp157c_dk2_start + get_runtime_offset();
barebox_arm_entry(STM32_DDR_BASE, SZ_512M, fdt);
--
2.24.0.rc1
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[PATCH 08/10] ARM: stm32mp: add basic DDR controller driver
The STM32MP DDR Controller has a very flexible way of mapping address
bits to columns/rows/banks. This is so far configured by the ARM TF-A
as part of the SDRAM setup, so we don't need to do this in barebox.
Nevertheless reading it out in barebox, allows us to determine unused
address bits and thus the total size of SDRAM configured.
Add a simple driver that parses the ddrctrl node and adds an appropriate
memory bank. This can later be used to remove explicit calls to
arm_add_mem_device in board code.
Signed-off-by: Ahmad Fatoum
---
arch/arm/mach-stm32mp/ddrctrl.c | 34 +
1 file changed, 34 insertions(+)
diff --git a/arch/arm/mach-stm32mp/ddrctrl.c b/arch/arm/mach-stm32mp/ddrctrl.c
index 90fb5e8956d0..b959441455d5 100644
--- a/arch/arm/mach-stm32mp/ddrctrl.c
+++ b/arch/arm/mach-stm32mp/ddrctrl.c
@@ -4,6 +4,7 @@
*/
#include
+#include
#include
#include
#include
@@ -119,3 +120,36 @@ void __noreturn stm32mp1_barebox_entry(void *boarddata)
{
barebox_arm_entry(STM32_DDR_BASE, stm32mp1_ddrctrl_ramsize(),
boarddata);
}
+
+
+static int stm32_ddrctrl_probe(struct device_d *dev)
+{
+ struct resource *iores;
+ void __iomem *base;
+
+ iores = dev_request_mem_resource(dev, 0);
+ if (IS_ERR(iores))
+ return PTR_ERR(iores);
+ base = IOMEM(iores->start);
+
+ arm_add_mem_device("ram0", STM32_DDR_BASE, ddrctrl_ramsize(base));
+
+ return 0;
+}
+
+static __maybe_unused struct of_device_id stm32_ddrctrl_dt_ids[] = {
+ { .compatible = "st,stm32-ddrctrl" },
+ { /* sentinel */ }
+};
+
+static struct driver_d stm32_ddrctrl_driver = {
+ .name = "stm32-ddrctrl",
+ .probe = stm32_ddrctrl_probe,
+ .of_compatible = DRV_OF_COMPAT(stm32_ddrctrl_dt_ids),
+};
+
+static int stm32_ddrctrl_init(void)
+{
+ return platform_driver_register(&stm32_ddrctrl_driver);
+}
+mem_initcall(stm32_ddrctrl_init);
--
2.24.0.rc1
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[PATCH 05/10] i2c: stm32: use device_reset_us helper instead of open-coding
The exact sequence is already available in form of device_reset_us. Make use of it. Signed-off-by: Ahmad Fatoum --- drivers/i2c/busses/i2c-stm32.c | 11 +++ 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/drivers/i2c/busses/i2c-stm32.c b/drivers/i2c/busses/i2c-stm32.c index 6af55fb3ffda..9f34760e3fdf 100644 --- a/drivers/i2c/busses/i2c-stm32.c +++ b/drivers/i2c/busses/i2c-stm32.c @@ -785,7 +785,6 @@ static int __init stm32_i2c_probe(struct device_d *dev) struct resource *iores; struct stm32_i2c *stm32_i2c; struct i2c_platform_data *pdata; - struct reset_control *rst; const struct stm32_i2c_setup *setup; struct i2c_timings *timings; int ret; @@ -799,13 +798,9 @@ static int __init stm32_i2c_probe(struct device_d *dev) return PTR_ERR(stm32_i2c->clk); clk_enable(stm32_i2c->clk); - rst = reset_control_get(dev, NULL); - if (IS_ERR(rst)) - return PTR_ERR(rst); - - reset_control_assert(rst); - udelay(2); - reset_control_deassert(rst); + ret = device_reset_us(dev, 2); + if (ret) + return ret; ret = dev_get_drvdata(dev, (const void **)&setup); if (ret) -- 2.24.0.rc1 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 10/10] ARM: stm32mp: dk2: don't hard-code memory size
There's new infrastructure for runtime determining RAM size. Use it so
we don't need to hard code it in PBL and board code.
Because this new infrastructure has some nested function calls, my
arm-v7a-linux-gnueabihf-gcc 9.2.1 (OSELAS.Toolchain-2019.09.0)
spills to the stack. Add stm32mp_cpu_lowlevel_init, which also sets up
a stack after barebox end so this works.
Lastly, there's no upstream device tree node for the DDR controller.
Add one in the barebox device tree, so we don't have to hardcode the
DDRCTRL address into non-pbl code that's run everywhere.
Signed-off-by: Ahmad Fatoum
---
arch/arm/boards/stm32mp157c-dk2/board.c| 11 ---
arch/arm/boards/stm32mp157c-dk2/lowlevel.c | 8 +++-
arch/arm/dts/stm32mp157c.dtsi | 7 +++
3 files changed, 10 insertions(+), 16 deletions(-)
diff --git a/arch/arm/boards/stm32mp157c-dk2/board.c
b/arch/arm/boards/stm32mp157c-dk2/board.c
index f15ae0b4aff0..9cd5b4ee1ff4 100644
--- a/arch/arm/boards/stm32mp157c-dk2/board.c
+++ b/arch/arm/boards/stm32mp157c-dk2/board.c
@@ -6,17 +6,6 @@
#include
#include
-static int dk2_mem_init(void)
-{
- if (!of_machine_is_compatible("st,stm32mp157c-dk2"))
- return 0;
-
- arm_add_mem_device("ram0", STM32_DDR_BASE, SZ_512M);
-
- return 0;
-}
-mem_initcall(dk2_mem_init);
-
static int dk2_postcore_init(void)
{
if (!of_machine_is_compatible("st,stm32mp157c-dk2"))
diff --git a/arch/arm/boards/stm32mp157c-dk2/lowlevel.c
b/arch/arm/boards/stm32mp157c-dk2/lowlevel.c
index 2106eaadc93a..7261d7a8bc58 100644
--- a/arch/arm/boards/stm32mp157c-dk2/lowlevel.c
+++ b/arch/arm/boards/stm32mp157c-dk2/lowlevel.c
@@ -1,8 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
#include
-#include
-#include
-#include
+#include
#include
extern char __dtb_z_stm32mp157c_dk2_start[];
@@ -17,12 +15,12 @@ ENTRY_FUNCTION(start_stm32mp157c_dk2, r0, r1, r2)
{
void *fdt;
- arm_cpu_lowlevel_init();
+ stm32mp_cpu_lowlevel_init();
if (IS_ENABLED(CONFIG_DEBUG_LL))
setup_uart();
fdt = __dtb_z_stm32mp157c_dk2_start + get_runtime_offset();
- barebox_arm_entry(STM32_DDR_BASE, SZ_512M, fdt);
+ stm32mp1_barebox_entry(fdt);
}
diff --git a/arch/arm/dts/stm32mp157c.dtsi b/arch/arm/dts/stm32mp157c.dtsi
index decb4ab6d5c4..bd2aabe6343a 100644
--- a/arch/arm/dts/stm32mp157c.dtsi
+++ b/arch/arm/dts/stm32mp157c.dtsi
@@ -24,6 +24,13 @@
psci {
compatible = "arm,psci-0.2";
};
+
+ soc {
+ memory-controller@5a003000 {
+ compatible = "st,stm32-ddrctrl";
+ reg = <0x5a003000 0x1000>;
+ };
+ };
};
&bsec {
--
2.24.0.rc1
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[PATCH 01/10] ARM: dts: stm32mp: move alias to SoC device tree
We'll want reliable ordering for other SD/MMC using boards as well, thus
move the alias out of the board device tree into the SoC's.
Signed-off-by: Ahmad Fatoum
---
arch/arm/dts/stm32mp157a-dk1.dtsi | 4
arch/arm/dts/stm32mp157c.dtsi | 1 +
2 files changed, 1 insertion(+), 4 deletions(-)
diff --git a/arch/arm/dts/stm32mp157a-dk1.dtsi
b/arch/arm/dts/stm32mp157a-dk1.dtsi
index e9e386a6649f..6be208f32ef2 100644
--- a/arch/arm/dts/stm32mp157a-dk1.dtsi
+++ b/arch/arm/dts/stm32mp157a-dk1.dtsi
@@ -8,10 +8,6 @@
#include
/ {
- aliases {
- mmc0 = &sdmmc1;
- };
-
chosen {
environment {
compatible = "barebox,environment";
diff --git a/arch/arm/dts/stm32mp157c.dtsi b/arch/arm/dts/stm32mp157c.dtsi
index 97c075a020f8..decb4ab6d5c4 100644
--- a/arch/arm/dts/stm32mp157c.dtsi
+++ b/arch/arm/dts/stm32mp157c.dtsi
@@ -18,6 +18,7 @@
gpio9 = &gpioj;
gpio10 = &gpiok;
gpio25 = &gpioz;
+ mmc0 = &sdmmc1;
};
psci {
--
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[PATCH 06/10] Documentation: boards: stm32mp: document boot error LED
The STM32MP Evaluation Kits place a LED on PA13 to display boot status. Document its blinking patterns. Signed-off-by: Ahmad Fatoum --- Documentation/boards/stm32mp.rst | 10 ++ 1 file changed, 10 insertions(+) diff --git a/Documentation/boards/stm32mp.rst b/Documentation/boards/stm32mp.rst index f93ec04eb04d..6d97b0d6d4a2 100644 --- a/Documentation/boards/stm32mp.rst +++ b/Documentation/boards/stm32mp.rst @@ -81,3 +81,13 @@ pulled down and BOOT0 and BOOT2 are connected to a 2P DIP switch:: BOOT2 | O --O | BOOT0 | N --O | < DFU on UART and USB OTG +---+ + +Boot status indicator +- + +The ROM code on the first Cortex-A7 core pulses the PA13 pad. +An error LED on this pad can be used to indicate boot status: + +* **Boot Failure:** LED lights bright +* **UART/USB Boot:** LED blinks fast +* **Debug access:** LED lights weak -- 2.24.0.rc1 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 09/10] ARM: stm32mp: add stm32mp_cpu_lowlevel_init with stack set up
When barebox is invoked out of the TF-A v2.1, it's started with
sp, r0, r1, r2 all equal to zero. To use the new RAM size calculating
stm32mp1_barebox_entry, we need to have a stack to handle spillage.
Add a stm32mp_cpu_lowlevel_init wrapper around arm_cpu_lowlevel_init,
which additionally configures a 64 byte stack after the end of the
barebox binary. This should be enough to help us through the RAM size
calculation. If not, compression will fail because of data corruption
and stack size can be increased as necessary.
Signed-off-by: Ahmad Fatoum
---
arch/arm/mach-stm32mp/include/mach/entry.h | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-stm32mp/include/mach/entry.h
b/arch/arm/mach-stm32mp/include/mach/entry.h
index 703712a9eea7..92e15b5cf4e3 100644
--- a/arch/arm/mach-stm32mp/include/mach/entry.h
+++ b/arch/arm/mach-stm32mp/include/mach/entry.h
@@ -1,7 +1,18 @@
#ifndef _STM32MP_MACH_ENTRY_H_
#define _STM32MP_MACH_ENTRY_H_
-#include
+#include
+#include
+
+static __always_inline void stm32mp_cpu_lowlevel_init(void)
+{
+ unsigned long stack_top;
+ arm_cpu_lowlevel_init();
+
+ stack_top = (unsigned long)__image_end + get_runtime_offset() + 64;
+ stack_top = ALIGN(stack_top, 16);
+ arm_setup_stack(stack_top);
+}
void __noreturn stm32mp1_barebox_entry(void *boarddata);
--
2.24.0.rc1
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