[coreboot] Question on flashrom 1.2
Hi Coreboot Team, Am trying flashrom 1.2 on W25R256JVEIQ NOR flash. Datasheet below https://www.mouser.ie/datasheet/2/949/Winbond_Electronics_Corporation_11012018_W25R256JV-1499901.pdf Flashrom supports below winbond DEVID's but not W25R series? In Ubuntu /sys/class/mtd0 does not exist error is seen #define WINBOND_NEX_W25Q40_V 0x4013 /* W25Q40BV; W25Q40BL (2.3-3.6V) */ #define WINBOND_NEX_W25Q80_V 0x4014 /* W25Q80BV */ #define WINBOND_NEX_W25Q16_V 0x4015 /* W25Q16CV; W25Q16DV */ #define WINBOND_NEX_W25Q32_V 0x4016 /* W25Q32BV; W25Q32FV in SPI mode (default) */ #define WINBOND_NEX_W25Q64_V 0x4017 /* W25Q64BV, W25Q64CV; W25Q64FV in SPI mode (default) */ #define WINBOND_NEX_W25Q128_V 0x4018 /* W25Q128BV; W25Q128FV in SPI mode (default) */ #define WINBOND_NEX_W25Q256_V 0x4019 /* W25Q256FV or W25Q256JV_Q (QE=1) */ #define WINBOND_NEX_W25Q512JV 0x4020 /* W25Q512JV */ #define WINBOND_NEX_W25Q20_W 0x5012 /* W25Q20BW */ #define WINBOND_NEX_W25Q40BW 0x5013 /* W25Q40BW */ #define WINBOND_NEX_W25Q80BW 0x5014 /* W25Q80BW */ #define WINBOND_NEX_W25Q40EW 0x6013 /* W25Q40EW */ #define WINBOND_NEX_W25Q80EW 0x6014 /* W25Q80EW */ #define WINBOND_NEX_W25Q16_W 0x6015 /* W25Q16DW */ #define WINBOND_NEX_W25Q32_W 0x6016 /* W25Q32DW; W25Q32FV in QPI mode */ #define WINBOND_NEX_W25Q64_W 0x6017 /* W25Q64DW; W25Q64FV in QPI mode */ #define WINBOND_NEX_W25Q128_W 0x6018 /* W25Q128FW; W25Q128FV in QPI mode */ #define WINBOND_NEX_W25Q256_W 0x6019 /* W25Q256JW */ #define WINBOND_NEX_W25Q128_V_M 0x7018 /* W25Q128JVSM */ #define WINBOND_NEX_W25Q256JV_M 0x7019 /* W25Q256JV_M (QE=0) */ #define WINBOND_NEX_W25Q32JW_M 0x8016 /* W25Q32JW...M */ #define WINBOND_NEX_W25Q64JW_M 0x8017 /* W25Q64JW...M */ #define WINBOND_NEX_W25Q128_DTR 0x8018 /* W25Q128JW_DTR */ #define WINBOND_NEX_W25Q256_DTR 0x8019 /* W25Q256JW_DTR aka W25Q256256JW-IM */ Is anyone aware whether the specific DEVID not supporting causes /sys/class/mtd0 does not exist? Thanks for your time! Best Regards Rao ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org
[coreboot] Personal challenge | Ramp up on coreboot : Trials on aftermarket X58 motherboards.
Hello everyone, I hope you're doing fine I would like to do some trials to see if I may be able to support few boards I have cause they are aftermarket withoout EFI and without firmware updates and not working as I would like them to. (https://askubuntu.com/questions/1370496/cant-boot-latests-lives-for-install-without-kernel-option-noapic-would-like) I really would not like to throw them... They are X58 chipset with ICH10 with Xeon Westmere on socket 1366 and SuperIO NCT5532D. (https://www.intel.com/content/dam/doc/datasheet/x58-express-chipset-datasheet.pdf) (https://www.intel.com/content/dam/doc/datasheet/io-controller-hub-10-family-datasheet.pdf) (https://datasheetspdf.com/pdf-file/1042365/novoTon/NCT5532D/1) I have the tooling to backup and restore the flash and already done that few time. I have built latest coreboot (4.14 using lenovo x201 config) with EDK2 firmware as payload (edk2-stable202108 NOOPT) successfully but nothing is happening after flash swap and power on. I have RS232 debug working at ttyS0 (at I/O 0x3f8 (irq = 4, base_baud = 115200) is a 16550A) >From the original firmware, just after power on, even before any bip or >display or keyboard light I see "Socket = 0" on serial, so the the original >firmware is able to output to this serial very early. I read quite a lot of literature about coreboot, but still, I am not sure how to pursue now. Thanks in advance, Have a nice day, Best Regards, Mickaël. ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org
[coreboot] Canceled event with note: EFI working group @ Tue 2021-11-23 11:00 - 12:00 (MST) (coreboot@coreboot.org)
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[coreboot] Re: Personal challenge | Ramp up on coreboot : Trials on aftermarket X58 motherboards.
Hi Mickaël, On Tue, Nov 23, 2021 at 11:29 AM Master wrote: > > Hello everyone, > > I hope you're doing fine > > I would like to do some trials to see if I may be able to support few boards > I have cause they are aftermarket withoout EFI and without firmware updates > and not working as I would like them to. > (https://askubuntu.com/questions/1370496/cant-boot-latests-lives-for-install-without-kernel-option-noapic-would-like) > I really would not like to throw them... > > They are X58 chipset with ICH10 with Xeon Westmere on socket 1366 and > SuperIO NCT5532D. > (https://www.intel.com/content/dam/doc/datasheet/x58-express-chipset-datasheet.pdf) > (https://www.intel.com/content/dam/doc/datasheet/io-controller-hub-10-family-datasheet.pdf) > (https://datasheetspdf.com/pdf-file/1042365/novoTon/NCT5532D/1) Only the ICH10 southbridge (southbridge/intel/i82801jx) is currently supported. Neither the CPU nor the X58 IOH are supported. Most of the complexity is RAM initialization, especially because Intel does not publicly document the relevant registers. It would likely take years for an experienced developer to implement RAM init in coreboot. The NCT5532D Super I/O isn't supported either, but it's easy to add support for it using the datasheet. > I have the tooling to backup and restore the flash and already done that few > time. > I have built latest coreboot (4.14 using lenovo x201 config) with EDK2 > firmware as payload (edk2-stable202108 NOOPT) successfully but nothing is > happening after flash swap and power on. Flashing a firmware image for a different board is a bad idea. In extreme cases, incompatible GPIO configuration can result in short-circuits. It's unlikely, though. > I have RS232 debug working at ttyS0 (at I/O 0x3f8 (irq = 4, base_baud = > 115200) is a 16550A) > From the original firmware, just after power on, even before any bip or > display or keyboard light I see "Socket = 0" on serial, so the the original > firmware is able to output to this serial very early. > > I read quite a lot of literature about coreboot, but still, I am not sure how > to pursue now. It's hard. I can give you general ideas on how to proceed (I'm pretty sure we can get coreboot to print something over RS232), but RAM init is still a major roadblock. Once serial output is working, it's possible to use SerialICE to gather useful information to reimplement RAM init. > Thanks in advance, > Have a nice day, > Best Regards, > Mickaël. > ___ > coreboot mailing list -- coreboot@coreboot.org > To unsubscribe send an email to coreboot-le...@coreboot.org Best regards, Angel ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org
