[dpdk-dev] [PATCH 1/2] driver/crypto: out-of-place symmetric operations

[Thomas Monjalon]

2016-03-29 10:39, Fiona Trahe:
> From: Arek Kusztal 
> 
> Driver now support out of place crypto operations,
> driver assumes both buffers can be of different size.

Please, could you explain what exactly means "out of place" operations?

[dpdk-dev] [PATCH 1/2] driver/crypto: out-of-place symmetric operations

[Jain, Deepak K]

Hi,

"Out-of-place" operation means the result of the operation will be written to 
the destination buffer instead of overwriting the source buffer as done in 
"in-place" operation.


-Original Message-
From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Thomas Monjalon
Sent: Tuesday, March 29, 2016 1:02 PM
To: Trahe, Fiona ; Kusztal, ArkadiuszX 

Cc: dev at dpdk.org; Doherty, Declan 
Subject: Re: [dpdk-dev] [PATCH 1/2] driver/crypto: out-of-place symmetric 
operations

2016-03-29 10:39, Fiona Trahe:
> From: Arek Kusztal 
> 
> Driver now support out of place crypto operations, driver assumes both 
> buffers can be of different size.

Please, could you explain what exactly means "out of place" operations?

[dpdk-dev] [PATCH 1/2] driver/crypto: out-of-place symmetric operations

[Fiona Trahe]

From: Arek Kusztal 

Driver now support out of place crypto operations,
driver assumes both buffers can be of different size.

Signed-off-by: Arek Kusztal 
---
 doc/guides/cryptodevs/qat.rst   |1 -
 drivers/crypto/qat/qat_crypto.c |   22 +-
 2 files changed, 13 insertions(+), 10 deletions(-)

diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index af90b46..4b8f782 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -62,7 +62,6 @@ Limitations
 * Chained mbufs are not supported.
 * Hash only is not supported except Snow3G UIA2.
 * Cipher only is not supported except Snow3G UEA2.
-* Only in-place is currently supported (destination address is the same as 
source address).
 * Only supports the session-oriented API implementation (session-less APIs are 
not supported).
 * Not performance tuned.
 * Snow3g(UEA2) supported only if cipher length, cipher offset fields are 
byte-aligned.
diff --git a/drivers/crypto/qat/qat_crypto.c b/drivers/crypto/qat/qat_crypto.c
index 29c1fe5..55884d6 100644
--- a/drivers/crypto/qat/qat_crypto.c
+++ b/drivers/crypto/qat/qat_crypto.c
@@ -689,17 +689,21 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t 
*out_msg)
*qat_req = ctx->fw_req;
qat_req->comn_mid.opaque_data = (uint64_t)(uintptr_t)op;

-   /*
-* The following code assumes:
-* - single entry buffer.
-* - always in place.
-*/
qat_req->comn_mid.dst_length =
-   qat_req->comn_mid.src_length =
-   rte_pktmbuf_data_len(op->sym->m_src);
+   qat_req->comn_mid.src_length =
+   rte_pktmbuf_data_len(op->sym->m_src);
+
qat_req->comn_mid.dest_data_addr =
-   qat_req->comn_mid.src_data_addr =
-   rte_pktmbuf_mtophys(op->sym->m_src);
+   qat_req->comn_mid.src_data_addr =
+   rte_pktmbuf_mtophys(op->sym->m_src);
+
+   if (unlikely(op->sym->m_dst != NULL)) {
+   qat_req->comn_mid.dest_data_addr =
+   rte_pktmbuf_mtophys(op->sym->m_dst);
+   qat_req->comn_mid.dst_length =
+   rte_pktmbuf_data_len(op->sym->m_dst);
+   }
+
cipher_param = (void *)&qat_req->serv_specif_rqpars;
auth_param = (void *)((uint8_t *)cipher_param + sizeof(*cipher_param));

-- 
1.7.0.7